Re: [PATCH v2 1/5] devicetree: bindings: Document qcom board compatible format

On 11/23/15 16:47, Stephen Boyd wrote: > On 11/22, Rob Herring wrote: >> >> Much more reasonable now. I do find the '/' in it a bit strange though. > I can remove the backslash if you like. Is a dash more preferred? > >> Acked-by: Rob Herring <r...@kernel.org>

Re: [PATCH 2/4] clk: arizona: Add clock driver for the Arizona devices

On 01/05, Charles Keepax wrote: > Add an initial clock driver for the Arizona series audio CODECs. > Currently this driver only provides support for parsing the two input > clocks (mclk1, mclk2) and providing the internally consumed 32k clock. > > Signed-off-by: Charles Keepax

Re: [PATCH] of/irq: Export of_irq_count()

On 12/22, Rob Herring wrote: > On Tue, Dec 22, 2015 at 6:22 AM, Mark Brown wrote: > > Some of the Qualcomm pinctrl drivers have started trying to use > > of_irq_count() in modular code but this fails to build as the symbol is > > not exported. Since there doesn't seem to be

Re: [PATCH v2 10/10] dt-bindings: Add DSIv2 documentation

On 11/23, Archit Taneja wrote: > > > On 11/21/2015 1:29 AM, Rob Herring wrote: > >+Stephen > > > >On Wed, Nov 18, 2015 at 9:24 AM, Archit Taneja > >wrote: > >>Hi Rob, > >> > >>On 11/18/2015 6:48 PM, Rob Herring wrote: > >>> > >>>+dt list > >>> > >>>On Wed, Nov 18, 2015

Re: [PATCH v2 10/10] dt-bindings: Add DSIv2 documentation

On 12/02, Stephen Boyd wrote: > > My only thought there would be to make of_clk_set_defaults() wait > until both clocks are registered before it does any parent > setting. But only in the case where the assigned parents contains > a clock that is provided by the node being proce

Re: [PATCH v2 10/10] dt-bindings: Add DSIv2 documentation

On 12/02, Archit Taneja wrote: > On 12/02/2015 01:50 PM, Stephen Boyd wrote: > > > >My only thought there would be to make of_clk_set_defaults() wait > >until both clocks are registered before it does any parent > >setting. But only in the case where the assigned

Re: [PATCH 1/3] ARM: imx: clk-vf610: fix SAI clock tree

d device tree is required which assign the audio clock properly > to VF610_CLK_SAIx_DIV. > > Signed-off-by: Stefan Agner <ste...@agner.ch> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux

Re: [PATCH 1/3] ARM: imx: clk-vf610: fix SAI clock tree

On 11/23, Shawn Guo wrote: > On Sat, Oct 17, 2015 at 09:05:20PM -0700, Stefan Agner wrote: > > > > Since Patch 3 also uses the fixed clock layout, it should be > > applied after the clock tree fix too... > > > > Not sure through which tree these changes should go? > > Mike, Stephen, > > Can I

Re: arm64: dts: qcom: Add apq8096 dragonboard dts skeletons

On 11/26, Rajendra Nayak wrote: > Add new dtsi and dts files for the apq8096 dragonboards with just > a serial device used as debug console > > Signed-off-by: Rajendra Nayak > --- > Patch applies on top of Stephens' patches to add msm8996 dtsi >

Re: arm64: dts: qcom: Add apq8096 dragonboard dts skeletons

On 12/01, Rajendra Nayak wrote: > > On 12/01/2015 05:18 AM, Stephen Boyd wrote: > > On 11/26, Rajendra Nayak wrote: > >> Add new dtsi and dts files for the apq8096 dragonboards with just > >> a serial device used as debug console > >> > >> Sign

Re: [PATCH v2 1/5] devicetree: bindings: Document qcom board compatible format

On 11/22, Rob Herring wrote: > On Fri, Nov 20, 2015 at 03:31:16PM -0800, Stephen Boyd wrote: > > Some qcom based bootloaders identify the dtb blob based on a set > > of device properties like SoC, platform, PMIC, and revisions of > > those components. In downstream kernels, t

Re: [PATCH v4 0/3] clk: Broadcom BCM63138 support

On 11/19, Florian Fainelli wrote: > On 19/11/15 17:00, Florian Fainelli wrote: > > On 29/10/15 18:23, Florian Fainelli wrote: > >> This patch series adds support for the Broadcom BCM63138 DSL SoCs > >> clocking framework. > >> > >> Since the HW is identical to the one found in Broadcom iProc SoCs,

Re: [RFC/PATCH] pinctrl: qcom: Add generic ssbi and spmi GPIO/MPP bindings

On 11/19, Rob Herring wrote: > On Tue, Nov 17, 2015 at 05:00:26PM -0800, Stephen Boyd wrote: > > The drivers don't really need to know which PMIC they're for, so > > make a generic binding for them. This alleviates us from updating > > the drivers every time a new PMIC

Re: [PATCH v4 1/3] clk: iproc: Extend binding to cover BCM63138

On 10/29, Florian Fainelli wrote: > Broadcom BCM63138 DSL SoCs have the same ARMPLL clocking infrastructure > as the Cygnus and iProc chips, add a dedicated compatible string and > document that the ARMPLL node is a valid node for this chip. > > Acked-by: Rob Herring >

Re: [PATCH v4 2/3] clk: bcm: Add BCM63138 clock support

On 10/29, Florian Fainelli wrote: > BCM63138 has a simple clocking domain which is primarily the ARMPLL > clocking complex, from which the ARM (CPU), APB and AXI clocks would be > derived from. > > Since the ARMPLL controller is entirely compatible with the iProc ARM > PLL, we just initialize it

Re: [PATCH v4 0/3] clk: Broadcom BCM63138 support

On 11/20, Florian Fainelli wrote: > On 20/11/15 10:46, Stephen Boyd wrote: > > On 11/19, Florian Fainelli wrote: > >> On 19/11/15 17:00, Florian Fainelli wrote: > >>> On 29/10/15 18:23, Florian Fainelli wrote: > >>>> This patch series adds support for t

[PATCH v2 3/5] arm: dts: qcom: Update ifc6540 compat for qcom boot format

The ifc6540 is an sbc (single board computer) board, so update the compatible field accordingly. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-a

[PATCH v2 4/5] arm64: dts: qcom: Alias pm8916 on msm8916 devices

Add an alias for pm8916 on msm8916 based SoCs so that the newly updated dtbTool can find the pmic compatible string and add the pmic-id element to the QCDT header. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 1 + arch/arm64/boot/dt

[PATCH v2 5/5] arm: dts: qcom: Add aliases for PMICs

Add an alias for the PMICs found on qcom based SoCs so that the newly updated dtbTool can find the PMIC compatible string and add the pmic-id element to the QCDT header. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 2 ++ arch/ar

[PATCH v2 1/5] devicetree: bindings: Document qcom board compatible format

. Future bootloaders may be updated to look at the compatible field instead of looking for the table of contents image. For non-updateable bootloaders, a new dtbTool program will parse the compatible string and generate a QCDT image from it. Signed-off-by: Stephen Boyd <sb...@codeaurora.

[PATCH v2 2/5] arm64: dts: qcom: Make msm8916-mtp compatible string compliant

This compatible string isn't compliant with the format for subtypes. Replace it with a compliant compatible type. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm64/boot/dts/qcom/msm8916-mtp.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm6

[PATCH v2 0/5] Remove the need for qcom,{msm-id,board-id,pmic-id}

Stephen Boyd (5): devicetree: bindings: Document qcom board compatible format arm64: dts: qcom: Make msm8916-mtp compatible string compliant arm: dts: qcom: Update ifc6540 compat for qcom boot format arm64: dts: qcom: Alias pm8916 on msm8916 devices arm: dts: qcom: Add aliases for PMICs

[PATCH] arm: dts: qcom: Add generic PMIC gpio/MPP compat strings

Add the generic compatible strings for the PMIC gpio and MPP modules found on qcom based PMICs. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iiva...@mm-sol.com> Cc: Bjorn Andersson <bjorn.anders...@sonymobile.com> Cc: Rob Herring <r...@kernel.org&g

Re: [PATCH] clk: add generic driver for fixed rate clock

On 11/17, Geert Uytterhoeven wrote: > Hi Stefan, > > (quoting the full driver, as it predates linux-clk) > > On Sun, Sep 1, 2013 at 6:40 AM, Stefan Kristiansson > wrote: > > This adds a simple driver with the only purpose to initialise > > the fixed rate

[PATCH] pinctrl: qcom: Add msm8996 pinctrl driver

.@codeaurora.org> [sb...@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- .../bindings/pinctrl/qcom,msm8996-pinctrl.txt | 199 ++ drivers/pinctrl/qcom/Kconfig |8 + drivers/pinctrl/qcom/Makefile

[PATCH 0/2] Add pm8994 gpio and mpp support

This adds the support for pm8994 gpio and mpp modules. Given that there's nothing besides a compatible string update, I'm going to send a separate patch to add generic compatible strings for these sorts of things. Stephen Boyd (2): pinctrl: qcom: spmi-gpio: Add pm8994 gpio support pinctrl

[PATCH 1/2] pinctrl: qcom: spmi-gpio: Add pm8994 gpio support

Update the binding and driver for pm8994-gpio devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iiva...@mm-sol.com> Cc: Bjorn Andersson <bjorn.anders...@sonymobile.com> Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- Documentation/dev

[PATCH 2/2] pinctrl: qcom: spmi-mpp: Add pm8994 mpp support

Update the driver and binding for pm8994-mpp devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iiva...@mm-sol.com> Cc: Bjorn Andersson <bjorn.anders...@sonymobile.com> Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- Documentation/devicetree/

[RFC/PATCH] pinctrl: qcom: Add generic ssbi and spmi GPIO/MPP bindings

ndersson <bjorn.anders...@sonymobile.com> Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- We can also figure out the number of the pins from the number of interrupts, so we really don't need to even look at the size of the reg property or model number for the spmi and ssbi modules. I'll pr

[PATCH 0/4] Add DTS for MSM8996 SoC and MTP

These patches add the initial dts files for the MSM8996 SoC and MTP evaluation board. Stephen Boyd (4): devicetree: bindings: Document Kryo cpu arm64: dts: Add msm8996 SoC and MTP board support arm64: dts: qcom: Add pm8994, pmi8994, pm8004 PMIC skeletons arm64: dts: qcom: Add pm8994 gpios

[PATCH 1/4] devicetree: bindings: Document Kryo cpu

Document the compatible string for the Kryo family of qcom cpus. Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- Documentation/devicetree/bindings/arm/cpus.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/

Re: [PATCH 1/3] devicetree: bindings: Document qcom board compatible format

On 11/12, Rob Herring wrote: > On Mon, Oct 26, 2015 at 02:25:10PM -0700, Stephen Boyd wrote: > > Some qcom based bootloaders identify the dtb blob based on a set > > of device properties like SoC, platform, PMIC, and revisions of > > those components. In downstream kernels, t

Re: [PATCH 1/3] devicetree: bindings: Document qcom board compatible format

On 11/12, Rob Herring wrote: > On Thu, Nov 12, 2015 at 1:44 PM, Stephen Boyd <sb...@codeaurora.org> wrote: > > On 11/12, Rob Herring wrote: > >> On Mon, Oct 26, 2015 at 02:25:10PM -0700, Stephen Boyd wrote: > > >> > +Some qcom based bootloade

Re: [PATCH 1/3] devicetree: bindings: Document qcom board compatible format

On 11/12, Olof Johansson wrote: > On Mon, Oct 26, 2015 at 2:25 PM, Stephen Boyd <sb...@codeaurora.org> wrote: > > +Examples: > > + > > + "qcom,msm8916-v1-cdp-pm8916-v2.1" > > This is just awkward, but this... > > > + > > +A CDP boar

Re: [PATCH 1/3] devicetree: bindings: Document qcom board compatible format

On 11/12, Rob Herring wrote: > On Thu, Nov 12, 2015 at 6:11 PM, Stephen Boyd <sb...@codeaurora.org> wrote: > > On 11/12, Rob Herring wrote: > >> On Thu, Nov 12, 2015 at 1:44 PM, Stephen Boyd <sb...@codeaurora.org> wrote: > >> > On 11/12, Rob Herring wr

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 11/03, Viresh Kumar wrote: > On 30-10-15, 15:18, Stephen Boyd wrote: > > A side-note. I wonder if it would be better style to have the > > node name be: > > > > opp@6 { > > > > At least it seems that the assumption is we can store a

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 11/03, Viresh Kumar wrote: > On 02-11-15, 11:21, Stephen Boyd wrote: > > Ah I see that after looking at the previous thread. Perhaps we > > can add such information into the documentation so that people > > aren't misled into thinking they're limited to 32 bits? > &g

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 10/31, Viresh Kumar wrote: > On 30-10-15, 14:49, Stephen Boyd wrote: > > I suppose if you wanted to have 64 possible combinations of some > > attribute you would just extend it to two 32 bit numbers in > > sequence? I don't see the limitation here, and hopefully there >

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 10/31, Viresh Kumar wrote: > On 30-10-15, 15:18, Stephen Boyd wrote: > > > Also, this makes it sound like opp-supported-hw is really just > > telling us if this is a supported frequency or not for the > > particular device we're running on. > > That's right. &g

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 10/30, Viresh Kumar wrote: > +- opp-supported-hw: User defined array containing a hierarchy of hardware > + version numbers, supported by the OPP. For example: a platform with > hierarchy > + of three levels of versions (A, B and C), this field should be like Z>, > + where X corresponds to

Re: [PATCH 02/19] clk: sunxi: Add PLL3 clock

On 10/30, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile > index a9e1a5885846..40c32ffd912c 100644 > --- a/drivers/clk/sunxi/Makefile > +++ b/drivers/clk/sunxi/Makefile > @@ -9,8 +9,9 @@ obj-y += clk-a10-mod1.o > obj-y += clk-a10-pll2.o > obj-y +=

Re: [PATCH 3/3] PM / OPP: Remove 'operating-points-names' binding

;viresh.ku...@linaro.org> > --- Reviewed-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body

Re: [PATCH 2/3] PM / OPP: Add {opp-microvolt|opp-microamp|turbo-mode|opp-suspend}- binding

r if it is provided > but doesn't match the properties present in the OPP node, we will fall > back to the original properties without the - string, if they are > available. > > Signed-off-by: Viresh Kumar <viresh.ku...@linaro.org> > --- Reviewed-by: Stephen Boyd <sb...

Re: [PATCH 1/3] PM / OPP: Add "opp-supported-hw" binding

On 10/30, Viresh Kumar wrote: > + opp_table { > + compatible = "operating-points-v2"; > + status = "okay"; > + opp-shared; > + > + opp00 { A side-note. I wonder if it would be better style to have the node name be: opp@6

Re: [PATCH 04/19] clk: sunxi: Add TCON channel1 clock

On 10/30, Maxime Ripard wrote: > The TCON is a controller generating the timings to output videos signals, > acting like both a CRTC and an encoder. > > It has two channels depending on the output, each channel being driven by > its own clock (and own clock controller). > > Add a driver for the

Re: [PATCH 01/19] clk: sunxi: Add display clock

On 10/30, Maxime Ripard wrote: > diff --git a/drivers/clk/sunxi/clk-sun4i-display.c > b/drivers/clk/sunxi/clk-sun4i-display.c > new file mode 100644 > index ..f13b095c6d7a > --- /dev/null > +++ b/drivers/clk/sunxi/clk-sun4i-display.c > @@ -0,0 +1,199 @@ > +/* > + * Copyright 2015

Re: [PATCH 01/16] PM / OPP: Add 'supply-names' binding

On 10/28, Mark Brown wrote: > On Tue, Oct 27, 2015 at 01:49:17PM +0530, Viresh Kumar wrote: > > On 23-10-15, 01:39, Mark Brown wrote: > > > > I'm not sure that's > > > a place we want to end up just yet, I think it's safer to just have a > > > little bit of code in the kernel that glues things

Re: [PATCH 08/13 v2] clk: add ARM syscon ICST device tree bindings

.org > Cc: Michael Turquette <mturque...@baylibre.com> > Cc: Stephen Boyd <sb...@codeaurora.org> > Cc: linux-...@vger.kernel.org > Signed-off-by: Linus Walleij <linus.wall...@linaro.org> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovati

Re: [PATCH v2 2/3] clk: bcm: Add BCM63138 clock support

On 10/26, Florian Fainelli wrote: > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig > index 85260fb96b36..a0c18528b70d 100644 > --- a/drivers/clk/bcm/Kconfig > +++ b/drivers/clk/bcm/Kconfig > @@ -1,3 +1,13 @@ > +config CLK_BCM_63XX > + bool "Broadcom BCM63xx clock support" > +

Re: [PATCH v3] EDAC: Add ARM64 EDAC

On 10/27, Brijesh Singh wrote: > diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig > index ef25000..84507b5 100644 > --- a/drivers/edac/Kconfig > +++ b/drivers/edac/Kconfig > @@ -390,4 +390,12 @@ config EDAC_XGENE > Support for error detection and correction on the > APM

Re: [PATCH v2 2/3] clk: bcm: Add BCM63138 clock support

On 10/27, Florian Fainelli wrote: > On 27/10/15 10:46, Stephen Boyd wrote: > > On 10/26, Florian Fainelli wrote: > >> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig > >> index 85260fb96b36..a0c18528b70d 100644 > >> --- a/drivers/clk/bcm/Kconfi

Re: [PATCH v2 0/3] clk: Broadcom BCM63138 support

On 10/26, Florian Fainelli wrote: > Hi all, > > This patch series adds support for the Broadcom BCM63138 DSL SoCs > clocking framework. > > Since the HW is identical to the one found in Broadcom iProc SoCs, but the > integration is different (obviously), there is still a new compatible string >

[PATCH 0/3] Remove the need for qcom,{msm-id,board-id,pmic-id}

through the board's compatible string. [1] http://lkml.kernel.org/g/1425503602-24916-1-git-send-email-ga...@codeaurora.org Stephen Boyd (3): devicetree: bindings: Document qcom board compatible format arm64: dts: qcom: Make msm8916-mtp compatible string compliant arm: dts: qcom: Update

[PATCH 2/3] arm64: dts: qcom: Make msm8916-mtp compatible string compliant

This compatible string isn't compliant with the format for subtypes. Replace it with a compliant compatible type. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm64/boot/dts/qcom/msm8916-mtp.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm6

[PATCH 1/3] devicetree: bindings: Document qcom board compatible format

. Future bootloaders may be updated to look at the compatible field instead of looking for the table of contents image. For non-updateable bootloaders, a new dtbTool program will parse the compatible string and generate a QCDT image from it. Signed-off-by: Stephen Boyd <sb...@codeaurora.

[PATCH 3/3] arm: dts: qcom: Update ifc6540 compat for qcom boot format

The ifc6540 is an sbc (single board computer) board, so update the compatible field accordingly. Signed-off-by: Stephen Boyd <sb...@codeaurora.org> --- arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-a

Re: [PATCH 08/13 v2] clk: add ARM syscon ICST device tree bindings

.org > Cc: Michael Turquette <mturque...@baylibre.com> > Cc: Stephen Boyd <sb...@codeaurora.org> > Cc: linux-...@vger.kernel.org > Signed-off-by: Linus Walleij <linus.wall...@linaro.org> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovati

Re: [PATCH 08/13] clk: add ARM syscon ICST device tree bindings

On 10/23, Linus Walleij wrote: > On Thu, Oct 15, 2015 at 9:23 PM, Stephen Boyd <sb...@codeaurora.org> wrote: > > On 10/15, Linus Walleij wrote: > > >> +Required properties: > >> +- lock-offset: the offset address into the system controller where the &

Re: [PATCH v2] EDAC: Add ARM64 EDAC

Drive by nitpicks On 10/21, Brijesh Singh wrote: > diff --git a/drivers/edac/cortex_arm64_edac.c > b/drivers/edac/cortex_arm64_edac.c > new file mode 100644 > index 000..c37bb94 > --- /dev/null > +++ b/drivers/edac/cortex_arm64_edac.c > + > +#define L1_CACHE 0 > +#define

Re: [PATCH v4 5/5] [RFC] clk: shmobile: r8a7795: Add new CPG/MSSR driver

On 10/22, Geert Uytterhoeven wrote: > Hi Mike, > > On Tue, Oct 20, 2015 at 3:07 PM, Geert Uytterhoeven > wrote: > > On Tue, Oct 20, 2015 at 3:00 PM, Michael Turquette > > wrote: > >> Quoting Geert Uytterhoeven (2015-10-20 05:31:12) > >>> On Tue,

Re: [PATCH v3 01/10] ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled

On 10/15, Jon Mason wrote: > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig > index 88febf5..46ee475 100644 > --- a/drivers/clk/bcm/Kconfig > +++ b/drivers/clk/bcm/Kconfig > @@ -9,10 +9,8 @@ config CLK_BCM_KONA > in the BCM281xx and BCM21664 families. > > config

Re: [PATCH v3 02/10] clk: cygnus: Convert all macros to all caps

On 10/15, Jon Mason wrote: > The macros that are being used to initialize the values of the clk > structures should be all caps. Find and replace all of them with their > relevant counterparts. > > Signed-off-by: Jon Mason > --- Applied to clk-next -- Qualcomm

Re: [PATCH v3 03/10] clk: iproc: Add PWRCTRL support

On 10/15, Jon Mason wrote: > Some iProc SoC clocks use a different way to control clock power, via > the PWRDWN bit in the PLL control register. Since the PLL control > register is used to access the PWRDWN bit, there is no need for the > pwr_base when this is being used. A new flag,

Re: [PATCH v3 04/10] clk: nsp: add clock support for Broadcom Northstar Plus SoC

On 10/15, Jon Mason wrote: > The Broadcom Northstar Plus SoC is architected under the iProc > architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all > derived from an onboard crystal. > > Signed-off-by: Jon Mason > --- Applied to clk-iproc -- Qualcomm

Re: [PATCH v3 07/10] clk: iproc: Separate status and control variables

On 10/15, Jon Mason wrote: > Some PLLs have separate registers for Status and Control. The means the > pll_base needs to be split into 2 new variables, so that those PLLs can > specify device tree registers for those independently. Also, add a new > driver flag to identify this presence of the

Re: [PATCH v3 06/10] clk: iproc: Split off dig_filter

On 10/15, Jon Mason wrote: > The PLL loop filter/gain can be located in a separate register on some > SoCs. Split these off into a separate variable, so that an offset can > be added if necessary. Also, make the necessary modifications to the > Cygnus and NSP drivers for this change. > >

Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC

On 10/15, Scott Branden wrote: > On 15-10-15 02:15 PM, Ray Jui wrote: > >On 10/15/2015 2:10 PM, Jon Mason wrote: > >>On Thu, Oct 15, 2015 at 02:04:09PM -0700, Scott Branden wrote: > >>>On 15-10-15 01:55 PM, Ray Jui wrote: > On 10/15/2015 1:40 PM, Scott Branden wrote: > > If using

Re: [PATCH v3 09/10] clk: iproc: define Broadcom NSP iProc clock binding

On 10/15, Jon Mason wrote: > Document the device tree bindings for Broadcom Northstar Plus > architecture based clock controller > > Signed-off-by: Jon Mason > --- Applied to clk-iproc -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux

Re: [PATCH v3 0/10] clk: iproc: add support for BCM NS, NSP, and NS2

ill send out those as > an RFC), and other minor changes that Stephen Boyd requested. > > This patch series adds support for the Broadcom Northstar, Northstar > Plus, and Northstar 2 clocks. Some slight modifications were necessary > to clk-iproc-pll to get Northstar and Northstar P

Re: [PATCH v3 08/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC

On 10/15, Jon Mason wrote: > The Broadcom Northstar 2 SoC is architected under the iProc > architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, > LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. > > Signed-off-by: Jon Mason > --- Applied to

Re: [PATCH v3 10/10] clk: iproc: define Broadcom NS2 iProc clock binding

On 10/15, Jon Mason wrote: > Document the device tree bindings for Broadcom Northstar 2 architecture > based clock controller > > Signed-off-by: Jon Mason > --- Applied to clk-iproc -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation

Re: [PATCH 1/3] clk: samsung: exynos4: Add SSS gate clock

given that it's part of a series that has dts changes I guess that means it should go through arm-soc: Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list:

Re: [PATCH v2 1/2] clk: samsung: exynos5250: Add DISP1 clocks

k to their original parents > > > when the domain is powered on again. > > > > > > We expose these two clocks in the DT bindings so that the DT node of the > > > power domain can reference them. > > > > > > Signed-off-by: Tomeu Vizos

Re: [PATCH 01/16] PM / OPP: Add 'supply-names' binding

On 10/16, Viresh Kumar wrote: > On 15-10-15, 17:22, Stephen Boyd wrote: > > I'm lost why we need this property at all. What happened to using > > > > opp-microvolt-0 = <1 2 3>; > > opp-microvolt-1 = <1>; > > opp-microvolt-2 = <

Re: [PATCH 01/10] clk: rockchip: Add sclk_mipidsi_24m for mipi dsi

On 10/10, Chris Zhong wrote: > sclk_mipidsi_24m is the gating of mipi dsi phy. > > Signed-off-by: Chris Zhong <z...@rock-chips.com> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> > > drivers/clk/rockchip/clk-rk3288.c | 2 +- > include/dt-bindings/cl

Re: [RFC 4/5] clk: iproc: define Broadcom NS2 iProc clock binding

On 10/14, Ray Jui wrote: > > > On 10/14/2015 8:44 AM, Jon Mason wrote: > > On Tue, Oct 13, 2015 at 03:24:52PM -0700, Ray Jui wrote: > >> Same as this patch. I thought device tree binding document should go > >> with the clock driver changes. > >> > >> Strictly speaking, device tree binding

Re: [PATCH 01/16] PM / OPP: Add 'supply-names' binding

On 09/14, Rob Herring wrote: > On 09/11/2015 07:01 AM, Viresh Kumar wrote: > > Regulators already have stable DT bindings, wherein the consumer (of > > supplies) will have following for each regulator/supply. > > > > -supply: ; > > > > Current OPP bindings extend above, by transforming it into a

Re: [PATCH 08/13] clk: add ARM syscon ICST device tree bindings

On 10/15, Linus Walleij wrote: > diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt > b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt > new file mode 100644 > index ..19eb3aa765c7 > --- /dev/null > +++

Re: [PATCH v1 1/2] clk: samsung: exynos5250: Add DISP1 clocks

hat the DT node of the > power domain can reference them. > > Signed-off-by: Tomeu Vizoso <tomeu.viz...@collabora.com> > --- Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

Re: [PATCH 09/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC

On 10/13/2015 09:51 AM, Scott Branden wrote: > > Is that really necessary at all I think something like this work > instead? > > -obj-$(CONFIG_ARCH_BCM)+= bcm/ > +obj-y+= bcm/ > > Yes that's fine too, as long as we don't add any obj-y inside bcm/Makefile -- Qualcomm

Re: [PATCH v2 0/4] arm64: dts: qcom: add support to LS and HS connectors

v1: > - removed useless comment spotted by Stephen Boyd. > - Use absolute names instead of lables for consistency suggested by > Stephen Boyd. > Reviewed-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora

Re: [PATCH v2 1/2] devicetree: add binding for generic mmio clocksource

On 10/09, Måns Rullgård wrote: > Stephen Boyd <sb...@codeaurora.org> writes: > > > On 10/09, Rob Herring wrote: > >> > >> Adding a ptr to the callback seems fine to me. > >> > > > > Does that mean a flag day? Urgh. Pain. I'm not op

Re: [PATCH 04/10] ARM: dts: enable clock support for BCM5301X

On 10/09, Jon Mason wrote: > On Fri, Oct 09, 2015 at 12:35:40AM -0700, Stephen Boyd wrote: > > On 10/02, Jon Mason wrote: > > > > > arch/arm/boot/dts/bcm5301x.dtsi | 67 > > > - > > > 1 file changed, 60 inser

Re: [PATCH v2 1/2] devicetree: add binding for generic mmio clocksource

On 10/09, Måns Rullgård wrote: > Stephen Boyd <sb...@codeaurora.org> writes: > > > > Does that mean a flag day? Urgh. Pain. I'm not opposed to adding > > a pointer, in fact it might be better for performance so that we > > don't take a cache miss in read() fun

Re: [PATCH 05/10] clk: iproc: Add PLL base write function

On 10/02, Jon Mason wrote: > diff --git a/drivers/clk/bcm/clk-iproc-pll.c b/drivers/clk/bcm/clk-iproc-pll.c > index e029ab3..a4602aa 100644 > --- a/drivers/clk/bcm/clk-iproc-pll.c > +++ b/drivers/clk/bcm/clk-iproc-pll.c > @@ -137,6 +137,18 @@ static int pll_wait_for_lock(struct iproc_pll *pll) >

Re: [PATCH 09/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC

On 10/02, Jon Mason wrote: > diff --git a/drivers/clk/bcm/clk-ns2.c b/drivers/clk/bcm/clk-ns2.c > new file mode 100644 > index 000..1d08281 > --- /dev/null > +++ b/drivers/clk/bcm/clk-ns2.c > @@ -0,0 +1,290 @@ > +/* > + * Copyright (C) 2015 Broadcom Corporation > + * > + * This program is free

Re: [PATCH 09/10] clk: ns2: add clock support for Broadcom Northstar 2 SoC

On 10/02, Jon Mason wrote: > diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms > index 23800a1..2790f21 100644 > --- a/arch/arm64/Kconfig.platforms > +++ b/arch/arm64/Kconfig.platforms > @@ -2,6 +2,7 @@ menu "Platform selection" > > config ARCH_BCM_IPROC > bool

Re: [PATCH 02/10] clk: nsp: add clock support for Broadcom Northstar Plus SoC

On 10/02, Jon Mason wrote: > diff --git a/drivers/clk/bcm/clk-nsp.c b/drivers/clk/bcm/clk-nsp.c > new file mode 100644 > index 000..708961a > --- /dev/null > +++ b/drivers/clk/bcm/clk-nsp.c > @@ -0,0 +1,139 @@ > +/* > + * Copyright (C) 2015 Broadcom Corporation > + * > + * This program is free

Re: [PATCH 05/10] clk: iproc: Add PLL base write function

On 10/02, Jon Mason wrote: > diff --git a/drivers/clk/bcm/clk-iproc-pll.c b/drivers/clk/bcm/clk-iproc-pll.c > index e029ab3..a4602aa 100644 > --- a/drivers/clk/bcm/clk-iproc-pll.c > +++ b/drivers/clk/bcm/clk-iproc-pll.c > @@ -137,6 +137,18 @@ static int pll_wait_for_lock(struct iproc_pll *pll) >

Re: [PATCH 04/10] ARM: dts: enable clock support for BCM5301X

On 10/02, Jon Mason wrote: > Replace current device tree dummy clocks with real clock support for > Broadcom Northstar SoCs. > > Signed-off-by: Jon Mason > --- I'd rather not take any dts changes through clk tree. > arch/arm/boot/dts/bcm5301x.dtsi | 67 >

Re: [PATCH v2 1/2] devicetree: add binding for generic mmio clocksource

On 10/09, Rob Herring wrote: > +Stephen who has worked on this code. > > On Fri, Oct 9, 2015 at 11:19 AM, Måns Rullgård wrote: > > Måns Rullgård writes: > > > >> Rob Herring writes: > >> > >>> On Wed, Oct 7, 2015 at 11:47 AM, Måns Rullgård

Re: [PATCH 3/5] clk: imx7d: add ADC root clock

On 10/08, Haibo Chen wrote: > Add ADC root clock support in imx7d clock tree. > > Signed-off-by: Haibo Chen <haibo.c...@freescale.com> > --- I see no cover letter indicating how you want this merged, so: Acked-by: Stephen Boyd <sb...@codeaurora.org> -- Qualcom

Re: [PATCH 4/4] arm64: dts: apq8016-sbc: enable spi buses on LS and HS

On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote: > This patch enables spi buses on low speed and high speed expansion > connectors on DB410C > > Signed-off-by: Srinivas Kandagatla > --- > arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 10 ++ > 1 file

Re: [PATCH 2/4] arm64: dts: qcom: Add msm8916 I2C nodes.

On 10/08/2015 04:19 AM, Srinivas Kandagatla wrote: > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi > b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index 85f7bee..d49ac37 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -233,6 +233,22 @@ >

Re: [PATCH v4 2/4] drivers: clk: st: PLL rate change implementation for DVFS

On 10/07, Gabriel Fernandez wrote: > Change A9 PLL rate, as per requirement from the cpufreq framework, > for DVFS. For rate change, the A9 clock needs to be temporarily sourced > from PLL external to A9 and then sourced back to A9-PLL > > Signed-off-by: Pankaj Dev >

Re: [PATCH v3 2/4] drivers: clk: st: PLL rate change implementation for DVFS

On 10/05, Gabriel Fernandez wrote: > @@ -452,7 +651,7 @@ static const struct clk_ops st_pll1200c32_ops = { > static struct clk * __init clkgen_pll_register(const char *parent_name, > struct clkgen_pll_data *pll_data, > void __iomem

Re: [PATCH v2] Add driver for the si514 clock generator chip

On 10/02, Mike Looijmans wrote: > On 02-10-15 01:34, Stephen Boyd wrote: > >>+ - clock-output-names: From common clock bindings. Recommended to be > >>"si514". > >>+ - clock-frequency: Output frequency to generate. This defines the output > >>

Re: [PATCH v2 1/4] drivers: clk: st: Support for enable/disable in Clockgen PLLs

On 08/24, Gabriel Fernandez wrote: > The patch adds support for enable/disable of the Clockgen PLLs. > clkgen_pll_enable/clkgen_pll_disable added as generic function for all PLLs. > > Signed-off-by: Pankaj Dev > Signed-off-by: Gabriel Fernandez >

Re: [PATCH v2 4/4] ARM: STi: DT: Add support for stih418 A9 pll

On 08/24, Gabriel Fernandez wrote: > Add support for new PLL-type for stih418 A9-PLL. > > Signed-off-by: Gabriel Fernandez > --- I assume this will go through arm-soc? -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation

Re: [PATCH v2 2/4] drivers: clk: st: PLL rate change implementation for DVFS

On 08/24, Gabriel Fernandez wrote: > Change A9 PLL rate, as per requirement from the cpufreq framework, > for DVFS. For rate change, the A9 clock needs to be temporarily sourced > from PLL external to A9 and then sourced back to A9-PLL > > Signed-off-by: Pankaj Dev >

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