Hello,
On Fri, Oct 30, 2015 at 11:01:16PM +0900, Jaedon Shin wrote:
> +static void brcm_sata_quirks(struct platform_device *pdev,
> + struct brcm_ahci_priv *priv)
> +{
> + if (priv->quirks & BRCM_AHCI_QUIRK_NONCQ) {
> + void __iomem *ctrl = priv->top_ctrl
On Fri, Oct 30, 2015 at 11:01:17PM +0900, Jaedon Shin wrote:
> Add quirk for phy interface of MIPS-based chipsets. The ARM-based
> chipsets have four phy interface control registers and each port has two
> registers but the MIPS-based chipsets have three. There are no
> information and
On Thu, Oct 29, 2015 at 02:22:15PM +0800, Tang Yuantian wrote:
> Freescale is renaming the LS2085A SoC to LS2080A.
> This patch addresses the same.
>
> Signed-off-by: Tang Yuantian
Applied 1-3 to libata/for-4.4 with cosmetic updates.
Thanks.
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To
On Fri, Oct 23, 2015 at 10:44:13AM +0900, Jaedon Shin wrote:
> Hi all,
>
> This patch series adds support SATA for BMIPS_GENERIC.
>
> Ralf,
> I request you to drop already submitted patches for NAND device nodes.
> It is merge conflicts with this patches.
>
Hello, Arnd.
On Mon, Sep 14, 2015 at 09:45:33AM +0200, Arnd Bergmann wrote:
> In general, we really want to leave drivers with a COMPILE_TEST dependency
> so they at least get cross-built on x86, ideally on all architectures.
Yeah, as long as it doesn't trigger silly warnings or errors on x86,
Hello, Yuantian.
On Fri, Sep 11, 2015 at 05:27:25AM +, Yuantian Tang wrote:
> Hi Tejun,
>
> Could you please take the version 1 patch?
> The version 2 patch can't address these warnings, and the version 1 can
> definitely remove them.
> In this case, that would cause any hidden bugs, so no
On Wed, Sep 09, 2015 at 05:16:22PM +0800, yuantian.t...@freescale.com wrote:
> From: Tang Yuantian
>
> kbuild test robot reports the warnings:
> drivers/ata/ahci_qoriq.c: In function 'ahci_qoriq_hardreset':
> >> include/asm-generic/io.h:163:2: warning: 'px_is' may be
On Mon, Sep 07, 2015 at 10:52:14AM +0200, Hans de Goede wrote:
> Hi,
>
> On 07-09-15 10:23, yuantian.t...@freescale.com wrote:
> >From: Tang Yuantian
> >
> >This reverts commit 5163fb62541e
> >("ahci: added support for Freescale AHCI sata")
> >
> >The reverted patch
cc'ing Hans again. Please always cc Hans for platform ahci drivers.
Hans, does this look ready now?
Thanks.
On Tue, Jun 09, 2015 at 02:23:50PM +0530, Suneel Garapati wrote:
Adds support for Ceva sata host controller on Xilinx
Zynq UltraScale+ MPSoC.
Signed-off-by: Suneel Garapati
On Tue, Jun 09, 2015 at 02:23:48PM +0530, Suneel Garapati wrote:
Adds support for CEVA SATA Host controller found on Xilinx Zynq
Ultrascale+ MPSoC.
Applied to libata/for-4.2.
Thanks!
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cc'ing Hans and quoting whole message.
Hans, can you please review this one?
Thanks.
On Fri, Jun 05, 2015 at 11:32:28AM +0530, Suneel Garapati wrote:
Adds support for Ceva sata host controller on Xilinx
Zynq UltraScale+ MPSoC.
Signed-off-by: Suneel Garapati suneel.garap...@xilinx.com
---
Hello, Brian.
On Thu, May 21, 2015 at 03:38:25PM -0700, Brian Norris wrote:
It's possible you're confusing binding documentation with .dts source
files? The DTS files (arch/*/boot/dts/) go through arch trees. For
instance, the arm-soc maintainers have a structured process by which
On Tue, May 12, 2015 at 04:28:19PM -0700, Brian Norris wrote:
Signed-off-by: Brian Norris computersforpe...@gmail.com
Applied to libata/for-4.2.
Thanks.
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More
On Thu, May 21, 2015 at 06:00:50PM -0400, Tejun Heo wrote:
Hello,
On Thu, May 21, 2015 at 06:52:51PM +0530, Kishon Vijay Abraham I wrote:
I'll pick [PATCH v3 2/5] Documentation: devicetree: add Broadcom SATA PHY
binding and
[PATCH v4] phy: add Broadcom SATA3 PHY driver for Broadcom STB
On Thu, May 21, 2015 at 03:03:28PM -0700, Brian Norris wrote:
[PATCH v3 3/5] ata: add Broadcom AHCI SATA3 driver for STB chips
Thanks. Also, this one?
[PATCH v3 1/5] Documentation: devicetree: add Broadcom SATA binding
devicetree patches usually haven't gone through libata tho. Is this
On Thu, May 21, 2015 at 03:26:10PM -0700, Brian Norris wrote:
On Thu, May 21, 2015 at 3:20 PM, Tejun Heo t...@kernel.org wrote:
On Thu, May 21, 2015 at 07:16:07PM -0300, Fabio Estevam wrote:
On Tue, May 12, 2015 at 8:28 PM, Brian Norris
computersforpe...@gmail.com wrote:
+ res
On Tue, May 12, 2015 at 04:28:21PM -0700, Brian Norris wrote:
Pretty straightforward driver, using the nice library-ization of the
generic ahci_platform driver.
Signed-off-by: Brian Norris computersforpe...@gmail.com
Applied to libata/for-4.2.
Hans, if you see any issues, please let me
Hello,
On Thu, May 21, 2015 at 03:13:06PM -0700, Brian Norris wrote:
Most subsystems take device tree binding patches for their constituent
drivers. And I see you've been merging others:
e35b98849f25 ata: sata_rcar: Add r8a7793 device support
8340bfeb03 ahci: st: Update the ahci_st DT
Hello,
On Thu, May 21, 2015 at 06:52:51PM +0530, Kishon Vijay Abraham I wrote:
I'll pick [PATCH v3 2/5] Documentation: devicetree: add Broadcom SATA PHY
binding and
[PATCH v4] phy: add Broadcom SATA3 PHY driver for Broadcom STB SoCs
in the linux-phy tree.
Applying patch 5 to libata/for-4.2.
On Thu, May 21, 2015 at 07:16:07PM -0300, Fabio Estevam wrote:
On Tue, May 12, 2015 at 8:28 PM, Brian Norris
computersforpe...@gmail.com wrote:
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ahci);
+ ahci = devm_ioremap_resource(pdev-dev, res);
+ if
(cc'ing Hans and quoting whole body for him)
On Thu, May 21, 2015 at 09:27:05AM +0530, Suneel Garapati wrote:
Adds support for Ceva sata host controller on Xilinx
Zynq UltraScale+ MPSoC.
Signed-off-by: Suneel Garapati suneel.garap...@xilinx.com
---
drivers/ata/Kconfig | 9 ++
Hello,
On Wed, May 06, 2015 at 12:51:12AM +0530, Suman Tripathi wrote:
+ switch (version) {
+ case XGENE_AHCI_V1:
+ hpriv-flags = AHCI_HFLAG_NO_NCQ;
+ /*
+ * Override the callbacks for storm ERRATA
+ */
+
Hello,
On Mon, May 04, 2015 at 10:13:11PM +0530, Suman Tripathi wrote:
AFAIK clearing host_irq_stat means we have handled port interrupts .
Now for our case we still have interrupts left because it didn't get
detected on
first ahci_port_intr. So you mean to handle that residual irq in the
On Wed, Apr 01, 2015 at 08:18:02PM +0530, Suman Tripathi wrote:
This patch enables full AHCI feature support for APM X-Gene SoC SATA host host
controller. The following errata's are removed:
1. 2a0bdff6b95 (ahci-xgene: fix the dma state machine lockup for the
IDENTIFY DEVICE
On Tue, Mar 31, 2015 at 08:35:09AM +0100, Peter Griffin wrote:
Currently the ahci_st driver will hang the system on probe, as the
st_configure_oob function does some register writes before the IP
is clocked. This patch moves the function call to after
ahci_platform_enable_resources (which
On Wed, Apr 01, 2015 at 12:13:36PM -0400, Tejun Heo wrote:
Signed-off-by : Suman Tripathi stripa...@apm.com
Applied to libata/for-4.1 w/ minor edit.
Reverted due to build failure from missing asm/cputype.h. Suman,
you're the develper and familiar with how the prerequisite patches
On Wed, Apr 01, 2015 at 05:39:56PM +0100, Russell King - ARM Linux wrote:
On Wed, Apr 01, 2015 at 12:31:16PM -0400, Tejun Heo wrote:
On Wed, Apr 01, 2015 at 12:13:36PM -0400, Tejun Heo wrote:
Signed-off-by : Suman Tripathi stripa...@apm.com
Applied to libata/for-4.1 w/ minor edit
On Tue, Mar 31, 2015 at 08:35:09AM +0100, Peter Griffin wrote:
Currently the ahci_st driver will hang the system on probe, as the
st_configure_oob function does some register writes before the IP
is clocked. This patch moves the function call to after
ahci_platform_enable_resources (which
On Tue, Mar 31, 2015 at 04:36:27PM +0100, Peter Griffin wrote:
This patch (and also the DT documentation change) can go via your tree. Maxime
will take the stih407 DT patch.
Hmmm... The first patch doesn't apply to libata/for-4.1?
Thanks.
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On Thu, Mar 12, 2015 at 08:15:15PM +0800, Vince Hsu wrote:
We have the generic PM domain support for Tegra SoCs now. So remove the
duplicated sequence here.
Signed-off-by: Vince Hsu vin...@nvidia.com
Can you please repost this patch w/ Hans de Goede
hdego...@redhat.com cc'd? Just reposting
On Mon, Feb 02, 2015 at 11:37:19PM +0530, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS. The
On Tue, Jan 27, 2015 at 11:26:11PM +0530, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_SMART pio mode
command for enumeration and device detection with ATA devices.It is the
same issue as in patch
www.spinics.net/lists/linux-ide/msg49092.html
The link is broken. Can
On Fri, Jan 16, 2015 at 08:58:18AM +0100, Hans de Goede wrote:
Hi,
On 15-01-15 15:09, Gregory CLEMENT wrote:
The current implementation of the libahci allows using one PHY per
port but we still have one single regulator for the whole
controller. This series adds the support of multiple
On Tue, Jan 06, 2015 at 03:32:14PM +0530, Suman Tripathi wrote:
This patch set implements the PMP support for APM X-Gene SoC AHCI SATA Host
Controller driver.
Hmm... still doesn't apply to for-3.20 after pulling in
for-3.19-fixes.
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git
On Tue, Jan 06, 2015 at 01:51:15PM +0530, Suman Tripathi wrote:
Hi
On Tue, Dec 16, 2014 at 10:19:35PM +0530, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_PACKET pio mode
command for enumeration and device detection with ATAPI devices.It is the
same issue as in patch
On Tue, Jan 06, 2015 at 07:10:31PM +0530, Suman Tripathi wrote:
Hi ,
For more info here is the git log output before applying the patch.
git log
commit b84b25cb0900b99b28c742dd33101be779f58259
Merge: 0628ee7 36aae28
Author: Tejun Heo t...@kernel.org
Date: Tue Jan 6 07:48:24 2015
On Tue, Dec 16, 2014 at 10:19:35PM +0530, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_PACKET pio mode
command for enumeration and device detection with ATAPI devices.It is the
same issue as in patch
www.spinics.net/lists/linux-ide/msg49092.html
Signed-off-by: Suman
On Mon, Jan 05, 2015 at 08:30:05AM -0500, Tejun Heo wrote:
On Mon, Jan 05, 2015 at 03:51:45PM +0530, Suman Tripathi wrote:
Due to H/W errata, the controller is unable to save the PMP
field fetched from command header before sending the H2D FIS.
When the device returns the PMP port field
On Mon, Dec 29, 2014 at 08:52:47AM +0530, Suman Tripathi wrote:
This patch addresses the issue with ATA_CMD_PACKET pio mode
command for enumeration and device detection with ATAPI devices.
The X-Gene AHCI controller has an errata in which it cannot clear
the BSY bit after the PIO setup FIS.
On Mon, Jan 05, 2015 at 07:33:06PM +0530, Suman Tripathi wrote:
Reverted due to conflicts with the endian fix patches. Please rebase
these two on top of them.
Will do that .. I should have wait for the endian patch getting
accepted. Sorry for that.
Ooh, please don't be sorry. It's
On Mon, Jan 05, 2015 at 03:51:45PM +0530, Suman Tripathi wrote:
Due to H/W errata, the controller is unable to save the PMP
field fetched from command header before sending the H2D FIS.
When the device returns the PMP port field in the D2H FIS, there is
a mismatch and results in command
Hello, Nick.
On Fri, Dec 26, 2014 at 04:06:11PM -0500, nick wrote:
I am assuming after reading this function's code, that this function is
completed and no longer
needs a fix me comment above it to be completed.
I do appreciate that you're studying the FIXME comments but at this
point I'm
On Mon, Nov 10, 2014 at 07:42:30PM +0100, Geert Uytterhoeven wrote:
Commit e67adb4e669db834 (sata_rcar: Add R-Car Gen2 SATA PHY support)
deprecated renesas,rcar-sata in favor of renesas,sata-r8a7779, but
the deprecated value was never documented in the binding documentation,
while it is still
On Wed, Oct 29, 2014 at 02:58:50PM +0100, Geert Uytterhoeven wrote:
Commit e67adb4e669db834 (sata_rcar: Add R-Car Gen2 SATA PHY support)
deprecated renesas,rcar-sata in favor of renesas,sata-r8a7779, but
the deprecated value was never documented in the binding documentation,
while it is still
On Wed, Oct 29, 2014 at 02:58:48PM +0100, Geert Uytterhoeven wrote:
Hi Tejun, Simon, Magnus,
This patch series improves DT bindings documentation and usage for the
sata_rcar driver.
The first patch was sent before by Valentine Barshak a while ago, but never
updated according to the
On Tue, Oct 28, 2014 at 12:45:32PM +0900, Yoshihiro Kaneko wrote:
From: Koji Matsuoka koji.matsuoka...@renesas.com
Signed-off-by: Koji Matsuoka koji.matsuoka...@renesas.com
Signed-off-by: Yoshihiro Kaneko ykaneko0...@gmail.com
Applied to libata/for-3.18-fixes.
Thanks.
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On Wed, Oct 15, 2014 at 05:59:37PM +0900, Yoshihiro Kaneko wrote:
From: Koji Matsuoka koji.matsuoka...@renesas.com
Signed-off-by: Koji Matsuoka koji.matsuoka...@renesas.com
Signed-off-by: Yoshihiro Kaneko ykaneko0...@gmail.com
Can you please respin the patch on top of libata/for-3.19?
On Mon, Sep 22, 2014 at 06:31:33PM +0530, Suman Tripathi wrote:
This patch fixes the error print invalid resource for the APM X-Gene
SoC AHCI SATA Host Controller driver. This print was due to the fact
that the controller 3 don't have a mux resource. This didn't result
in any errors but the
On Mon, Sep 15, 2014 at 01:10:01PM +0530, Suman Tripathi wrote:
[suman] : So the posted version is acceptable ? Any others comments on this
patch ?
I'm suggesting setting ctx-cs_mux to NULL on failure. IOW,
if (res) {
ctx-csr_mux = devm_ioremap_resources();
Hello,
On Sun, Sep 14, 2014 at 11:36:51AM +0530, Suman Tripathi wrote:
We can maintain same piece (IS_ERR(ctx-csr_mux)), then we can do the
below instead of NULL ??
ctx-csr_mux = res ? devm_ioremap_resource(dev, res) : ERR_PTR(-EINVAL);
Setting it to NULL on failure would probably make
On Fri, Sep 12, 2014 at 01:24:08PM +0530, Suman Tripathi wrote:
This patch fixes the error print invalid resource for the APM X-Gene
SoC AHCI SATA Host Controller driver. This print was due to the fact
that the controller 3 don't have a mux resource. This didn't result
in any errors but the
On Thu, Aug 28, 2014 at 02:51:21PM +0530, Suman Tripathi wrote:
This patch implements the feature to skip the PHY and clock
initialization if it is already configured by the firmware.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
Applied to
On Tue, Aug 26, 2014 at 12:17:35PM +0530, Suman Tripathi wrote:
Didn't I ask you to update the comment to explain what's going on?
[suman] : can you specifically tell which part of the comment is not clear
and need more explanation?
The comment on top of the function doesn't seem to match
On Sun, Aug 24, 2014 at 12:07:27AM +0530, Suman Tripathi wrote:
This patch addresses two HW erratas as described below by retrying the
COMRESET:
1. During speed negotiation, controller is not able to detect ALIGN
at GEN3(6Gbps) within 54.6us and results in a timeout. This issue can
be
On Thu, Aug 21, 2014 at 01:48:00PM +0530, Suman Tripathi wrote:
[suman] : The problem is COMRESET didn't failed. I meant the hardreset is
successful (return 0) but the device is not detected even if device is
present due to speed negotiation failure. For that reason I check for the
Pxstatus
On Tue, Aug 19, 2014 at 12:01:50PM +0530, Suman Tripathi wrote:
This patch implements the feature to skip the PHY and clock
initialization if it is already configured by the firmware.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
...
+static int
On Tue, Aug 19, 2014 at 12:01:51PM +0530, Suman Tripathi wrote:
The link down issue in first attempt happens due to 2 H/W errata below:
1. Due to HW errata, during speed negotiation, sometimes controller
is not able to detect ALIGN at GEN3(6Gbps) within 54.6us results in
a timeout. This
On Fri, Aug 08, 2014 at 09:44:25PM +0530, Suman Tripathi wrote:
This patch removes the NCQ support from the APM X-Gene SoC AHCI
Host Controller driver as it doesn't support it.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
Applied to
Hello,
On Wed, Jul 30, 2014 at 10:20:38AM +0200, Antoine Ténart wrote:
How do you want me to send the series? There is two conflicts when
applying to libata/for-3.17:
- patch 4/8: it takes into account a patch not in libata/for-3.17 but
added before rc7. It should be better to first merge
On Wed, Jul 30, 2014 at 06:47:21PM +0200, Antoine Ténart wrote:
On Wed, Jul 30, 2014 at 11:35:26AM -0400, Tejun Heo wrote:
On Wed, Jul 30, 2014 at 10:20:38AM +0200, Antoine Ténart wrote:
How do you want me to send the series? There is two conflicts when
applying to libata/for-3.17
On Tue, Jul 29, 2014 at 12:24:48PM +0530, Suman Tripathi wrote:
This patch set contains a couple of fixes related to APM X-Gene SATA
controller driver.
v2 Change:
1. Drop the Link down retry patch from this patch set.
v4 Change:
1. Drop the patch to fix the csr-mask in dts for PHY
On Tue, Jul 29, 2014 at 08:05:45PM +0530, Suman Tripathi wrote:
Hi,
Applied 1 and 3 to libata/for-3.17. 4 doesn't apply. Also, please
prefix the patches with ahci_xgene: from now on.
[suman] : You mean the Remove NCQ patch is not applied. Any reason for
that ?
I meant that the patch
A couple nit picks.
On Thu, Jul 24, 2014 at 11:17:25AM +0200, Antoine Ténart wrote:
@@ -321,6 +321,8 @@ struct ahci_host_priv {
u32 cap;/* cap to use */
u32 cap2; /* cap2 to use */
u32
On Mon, Jul 28, 2014 at 12:29:56PM +0200, Hans de Goede wrote:
...
+ if (!enabled_ports) {
+ dev_warn(dev, No port enabled\n);
+ return ERR_PTR(-ENODEV);
This should be:
rc = -ENODEV;
goto err_out;
On Mon, Jul 21, 2014 at 09:28:36AM +0100, Lee Jones wrote:
Cc: devicetree@vger.kernel.org
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Acked-by: Alexandre Torgue alexandre.tor...@st.com
Signed-off-by: Lee Jones lee.jo...@linaro.org
---
Hi Tejun,
This patch has been on the MLs for
On Fri, Jul 18, 2014 at 02:30:02PM +0200, Antoine Ténart wrote:
@@ -321,6 +321,8 @@ struct ahci_host_priv {
u32 cap;/* cap to use */
u32 cap2; /* cap2 to use */
u32 port_map; /* port map
(cc'ing Hans who's now maintaining libahci-platform.)
On Fri, Jul 18, 2014 at 02:29:59PM +0200, Antoine Ténart wrote:
Tejun, Kishon, Sebastian,
I looked into the AHCI framework to see how to map PHYs and ports
information. I see two ways of doing this:
- We can attach the ahci_port_priv
On Thu, Jul 10, 2014 at 07:19:15PM +0530, Suman Tripathi wrote:
This patch fixes the watermark threshold of the receive FIFO for the
APM X-Gene SATA host controller driver.
Can you please explain what are the effects of these patches? Patch
descriptions should include why the specific changes
Hello,
On Wed, Jul 09, 2014 at 10:23:31AM +0200, Antoine Ténart wrote:
It is confusing. If you wanna pass around available ports in hpriv,
please add a separate field and replace the arguments to
save_initial_config().
I don't get it. Which argument should I replace in
On Wed, Jul 09, 2014 at 05:24:46PM +0200, Alexandre Belloni wrote:
Hi,
On 09/07/2014 at 09:59:10 -0400, Tejun Heo wrote :
Heh, I get that but, at the same time, this is the point where you're
most motivated to actually work on it. :)
Or, starting that kind of review after 9
(Cc'ing Hans.)
On Mon, Jul 07, 2014 at 12:16:09PM +0200, Antoine Ténart wrote:
@@ -482,6 +482,13 @@ void ahci_save_initial_config(struct device *dev,
port_map = mask_port_map;
}
+ /*
+ * If port_map was filled automatically when finding port sub-nodes,
+
One more thing.
On Mon, Jul 07, 2014 at 12:16:09PM +0200, Antoine Ténart wrote:
This introduce a new way of defining SATA ports in the device tree, with
one port per sub-node. This as the advantage of allowing a per port
configuration. Because some ports may be accessible but disabled in the
On Mon, Jul 07, 2014 at 10:33:03PM +0530, Suman Tripathi wrote:
This patch addresses the dma state machine lockup for APM X-Gene SoC.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
Applied to libata/for-3.16-fixes.
Thanks.
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Hello,
On Tue, Jul 08, 2014 at 07:03:53PM +0200, Antoine Ténart wrote:
So, hpriv-port is both input and output? This is messy and can lead
to confusing failures and there now are multiple ways to modify
port_map. If carrying this information through ahci_host_priv is
necessary, let's
Hey,
On Tue, Jul 08, 2014 at 07:49:00PM +0200, Antoine Ténart wrote:
So, yeah, it's being used both as input and output and we also have
the arguments which affect port_map, right? It does seem confusing.
I do see priv-port_map as being automatically set and then restricted
if needed by
Hello,
On Wed, Jul 02, 2014 at 03:45:07PM +0530, Suman Tripathi wrote:
+int ahci_restart_engine(struct ata_port *ap)
+{
+ struct ahci_host_priv *hpriv = ap-host-private_data;
+
+ ahci_stop_engine(ap);
+ ahci_start_fis_rx(ap);
+ hpriv-start_engine(ap);
+
+ return 0;
On Wed, Jun 25, 2014 at 11:29:14PM +0800, Shawn Guo wrote:
I will apply the last two dts patches via IMX tree, and please apply
the first 6 patches through your tree.
Alright, applied the rest to libata/for-3.17.
Thanks.
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Hello,
On Mon, Jun 23, 2014 at 03:23:13PM +0530, Suman Tripathi wrote:
This patch fixes the dma state machine lockup due to the processing
of IDENTIFY DEVICE PIO mode command. The X-Gene AHCI controller
has an errata in which it cannot clear the BSY bit after
receiving the PIO setup FIS and
On Tue, Jun 24, 2014 at 11:19:01AM +0100, Russell King - ARM Linux wrote:
Another round of these patches. I've integrated Shawn's patch to split
the documentation into this series so I can add the DT documentation
on top of it.
.../devicetree/bindings/ata/ahci-platform.txt | 6 -
Hello,
On Mon, Jun 23, 2014 at 03:45:37PM +0530, Suman Tripathi wrote:
@@ -234,15 +237,20 @@ static int xgene_ahci_do_hardreset(struct ata_link
*link,
u8 *d2h_fis = pp-rx_fis + RX_FIS_D2H_REG;
void __iomem *port_mmio = ahci_port_base(ap);
struct ata_taskfile tf;
+ int
On Thu, Jun 19, 2014 at 12:20:54PM +0530, Suman Tripathi wrote:
+ /*
+ * Restart the dma engine if the last cmd issued
+ * is IDENTIFY DEVICE command
+ */
+ if (unlikely(ctx-last_cmd[ap-port_no] == ATA_CMD_ID_ATA))
+ ahci_restart_engine(ap);
Is it really
On Thu, Jun 19, 2014 at 07:44:28PM +0530, Suman Tripathi wrote:
Hi Tejun,
On Thu, Jun 19, 2014 at 12:20:54PM +0530, Suman Tripathi wrote:
+ /*
+ * Restart the dma engine if the last cmd issued
+ * is IDENTIFY DEVICE command
+ */
+ if
Two more things.
On Thu, Jun 19, 2014 at 12:20:54PM +0530, Suman Tripathi wrote:
/**
+ * xgene_ahci_qc_issue - Issue commands to the device
+ * @qc: Command to issue
+ *
+ * Due to H/W errata, for the IENTIFY DEVICE command
+ * controller is unable to clear the BSY bit after
+ * receiving
Hello,
On Mon, Jun 16, 2014 at 03:05:35PM +0530, Suman Tripathi wrote:
This patch implements the function ahci_restart_engine function to restart
the port dma engine.
Please fit the text under 80 column.
---
I can't apply w/o your SOB.
+int ahci_restart_engine(struct ata_port *ap)
+{
+
On Mon, Jun 16, 2014 at 03:05:36PM +0530, Suman Tripathi wrote:
This patch fixes the dma state machine lockup due to the IDENTIFY DEVICE PIO
mode command. The controller is unable to clear the BSY bit after receiving
the PIO setup FIS and results the dma state machine to go into the
On Sat, Jun 07, 2014 at 02:58:53AM +0530, Suman Tripathi wrote:
This patch implements the function restart_engine function to add the
flexibility to restart the port dma engine from the libata framework.
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
On Sat, Jun 07, 2014 at 02:58:54AM +0530, Suman Tripathi wrote:
@@ -5072,6 +5072,16 @@ int ata_qc_complete_multiple(struct ata_port *ap, u32
qc_active)
if (qc) {
ata_qc_complete(qc);
nr_done++;
+ /*
+
On Tue, Mar 18, 2014 at 12:14:37PM -0600, Loc Ho wrote:
This patch fixes an compiler warning with APM X-Gene host controller
driver when compiled with DEBUG enabled.
Signed-off-by: Loc Ho l...@apm.com
Applied to libata/for-3.15.
Thanks.
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On Fri, Mar 14, 2014 at 05:53:17PM -0600, Loc Ho wrote:
This patch adds support for the APM X-Gene SoC AHCI SATA host controller. In
order for the host controller to work, the corresponding PHY driver
musts also be available. Currently, only Gen3 disk is supported with this
initial version.
On Wed, Mar 05, 2014 at 03:44:49PM -0700, Loc Ho wrote:
This patch adds APM X-Gene SoC AHCI SATA host controller DTS entries.
I pulled the phy branch into libata/for-3.15 but this patch fails to
apply. Can you please regenerate the patches which need to be applied
on top of libata/for-3.15.
On Sun, Mar 09, 2014 at 10:23:33PM -0700, Loc Ho wrote:
Hi Tejun,
On Fri, Mar 7, 2014 at 9:28 AM, Loc Ho l...@apm.com wrote:
This patch adds the DTS entries for the APM X-Gene SoC 15Gbps Multi-purpose
PHY driver. The PHY for SATA controller 2 and 3 are enabled by default.
On Wed, Mar 05, 2014 at 08:17:49PM +0100, Hans de Goede wrote:
This fixes the following warnings when CONFIG_PM_SLEEP is not set:
drivers/ata/ahci_imx.c:284:12: warning: ‘imx_ahci_suspend’ defined but not
used [-Wunused-function]
drivers/ata/ahci_imx.c:299:12: warning: ‘imx_ahci_resume’
On Tue, Feb 25, 2014 at 05:35:37PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Tuesday 25 February 2014 11:44 AM, Loc Ho wrote:
This patch adds function set_speed to the generic PHY framework operation
structure. This function can be called to instruct the PHY underlying layer
at
Hello, Loc.
Almost there. Just one more thing.
On Sun, Feb 23, 2014 at 10:54:24PM -0700, Loc Ho wrote:
+static int xgene_ahci_init_memram(struct xgene_ahci_context *ctx)
+{
+ void __iomem *diagcsr = ctx-csr_base + SATA_DIAG_OFFSET;
+ int try;
+ u32 val;
+
+ val =
On Sun, Feb 23, 2014 at 10:54:25PM -0700, Loc Ho wrote:
Signed-off-by: Loc Ho l...@apm.com
Signed-off-by: Tuan Phan tp...@apm.com
Signed-off-by: Suman Tripathi stripa...@apm.com
This doesn't apply cleanly to libata/for-3.15. How should this be
routed?
Thanks.
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Hey,
On Mon, Feb 24, 2014 at 05:02:52PM -0800, Loc Ho wrote:
The completion of the RAM removal from shutdown is quite fast. As per
spec, the max time is 1ms but from the run-time code, it only take one
(1us) or two (2us) read for this to completed. An 1 ms hard delay is more
than 100 time
On Sun, Feb 23, 2014 at 12:52:41PM +0100, Hans de Goede wrote:
ahci_sunxi_phy_init is called from the probe and resume code paths, and
sleeping is safe in both, so use msleep instead of mdelay.
Signed-off-by: Hans de Goede hdego...@redhat.com
Applied to libata/for-3.15. Thanks.
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On Sat, Feb 22, 2014 at 05:26:48PM +0100, Hans de Goede wrote:
Tejun, can you please add patches 1-12 to your ata tree for 3.15 ?
Applied 1-12 to libata/for-3.15 with comment format slightly updated.
Thanks.
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On Sat, Feb 22, 2014 at 04:53:36PM +0100, Hans de Goede wrote:
...
+static int ahci_sunxi_phy_init(struct device *dev, void __iomem *reg_base)
+{
+ u32 reg_val;
+ int timeout;
+
+ /* This magic is from the original code */
+ writel(0, reg_base + AHCI_RWCR);
+ mdelay(5);
On Sat, Feb 22, 2014 at 05:22:52PM +0100, Hans de Goede wrote:
Hi Tejun, Marek,
This series, which is to be applied on top of my ahci_platform restructering
series, mostly speaks for itself.
I've some doubts about the 2nd patch, which removes the imx53-ahci platform
device support from
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