On Tue, Dec 15, 2015 at 09:38:41PM +0100, Arnd Bergmann wrote:
> On Tuesday 15 December 2015 18:42:36 Thierry Reding wrote:
> > On Tue, Dec 15, 2015 at 05:34:00PM +0100, Arnd Bergmann wrote:
> > > On Tuesday 15 December 2015 17:31:22 Thierry Reding wrote:
> > > > On M
On Sun, Dec 06, 2015 at 01:31:56PM +0200, Vladimir Zapolskiy wrote:
> The changeset fixes a number of issues within current implementation
> of LPC32xx PWM controller driver, namely
> - the SoC has two independent PWM controllers with one channel each,
> - runtime warnings from common clock framewo
On Wed, Dec 02, 2015 at 07:41:10PM +0100, Lucas Stach wrote:
> KYO is the stock ticker symbol of Kyocera Corporation.
>
> Signed-off-by: Lucas Stach
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Both patches applied, thanks.
Thierry
sig
On Tue, Dec 15, 2015 at 05:34:00PM +0100, Arnd Bergmann wrote:
> On Tuesday 15 December 2015 17:31:22 Thierry Reding wrote:
> > On Mon, Dec 14, 2015 at 12:39:44PM +0100, Arnd Bergmann wrote:
> > > On Wednesday 18 November 2015 17:56:22 Andy Yan wrote:
> > > > rockch
On Mon, Dec 14, 2015 at 12:39:44PM +0100, Arnd Bergmann wrote:
> On Wednesday 18 November 2015 17:56:22 Andy Yan wrote:
> > rockchip platform have a protocol to pass the kernel reboot
> > mode to bootloader by some special registers when system reboot.
> > By this way the bootloader can take differ
On Wed, Oct 07, 2015 at 10:59:53PM +0200, Maciej S. Szmigiero wrote:
> This adds vendor prefix for United Radiant Technology Corporation,
> a provider of liquid crystal display technologies.
>
> Signed-off-by: Maciej Szmigiero
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
>
On Tue, Nov 24, 2015 at 01:58:13PM +0800, Yong Wu wrote:
> On Fri, 2015-10-23 at 11:26 +0200, Joerg Roedel wrote:
> > On Thu, Oct 22, 2015 at 12:40:02PM +0800, Yong Wu wrote:
> > > But the mtk-iommu depend on the drivers/memory/mtk-smi.c(mtk-iommu
> > > has called a function of the mtk-smi).
>
On Fri, Oct 30, 2015 at 03:34:29PM -0700, Bjorn Andersson wrote:
> From: Werner Johansson
>
> Signed-off-by: Werner Johansson
> Signed-off-by: Bjorn Andersson
> ---
>
> Change since v1:
> - Dropped -vid suffix from compatible
>
> .../bindings/display/panel/sharp,ls043t1le01.txt | 22
> +++
On Fri, Oct 30, 2015 at 05:38:27PM -0700, bj...@kryo.se wrote:
> From: Werner Johansson
>
> This patch adds bindings for the Panasonic VVX10F034N00
> WUXGA panel.
>
> Signed-off-by: Werner Johansson
> Signed-off-by: Bjorn Andersson
> ---
> .../bindings/panel/panasonic,vvx10f034n00.txt
On Wed, Nov 18, 2015 at 03:57:47PM -0500, Akshay Bhat wrote:
> Add support for Innolux CheMei 12" G121X1-L03 XGA LVDS display.
>
> Datasheet: http://www.azdisplays.com/PDF/G121X1-L03.pdf
> Signed-off-by: Akshay Bhat
> ---
> .../bindings/display/panel/innolux,g121x1-l03.txt | 7 +
> drivers
On Fri, Nov 20, 2015 at 04:15:38PM +0800, Chris Zhong wrote:
> This binding specifies a set of common properties for display panels. It
> can be used as a basis by bindings for specific panels.
> Bindings for three specific panels are provided to show how the
> simple panel binding can be used.
>
On Fri, Nov 20, 2015 at 04:15:36PM +0800, Chris Zhong wrote:
> Signed-off-by: Chris Zhong
> Acked-by: Rob Herring
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
>
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1 insertion(+)
Applied
On Thu, Nov 19, 2015 at 09:39:02PM +0800, Andy Yan wrote:
> Hi Thierry:
>
> 2015-11-19 20:56 GMT+08:00 Thierry Reding :
>
> > On Thu, Nov 19, 2015 at 09:17:37AM +0800, Andy Yan wrote:
> > > Hi Rob:
> > >
> > > On 2015年11月19日 06:59, Rob Herring wro
On Thu, Nov 19, 2015 at 09:17:37AM +0800, Andy Yan wrote:
> Hi Rob:
>
> On 2015年11月19日 06:59, Rob Herring wrote:
> >On Wed, Nov 18, 2015 at 05:53:30PM +0800, Andy Yan wrote:
> >>Add devicetree binding document for rockchip reboot nofifier driver
> >Just reading the subject this is way too specific
On Wed, Nov 04, 2015 at 01:59:51PM -0700, Stephen Warren wrote:
> On 11/04/2015 10:11 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >Extend the binding to cover the set of feature found in Tegra210.
>
> >diff --git
> >a/Documentation/devic
On Wed, Nov 04, 2015 at 01:54:15PM -0700, Stephen Warren wrote:
> On 11/04/2015 10:11 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
> >set of lanes that are used for PCIe, SATA and US
On Mon, Oct 26, 2015 at 05:02:53PM -0600, Stephen Warren wrote:
> On 10/26/2015 04:22 PM, Tom Warren wrote:
> >This patch adds the device tree binding doc for the Tegra
> >QSPI controller on Tegra210.
>
> Acked-by: Stephen Warren
>
> (I assume if others approve the binding, Thierry will take it
On Mon, Oct 26, 2015 at 10:32:34PM +0100, Olliver Schinagl wrote:
> The pwm-block of some of the sunxi chips feature a 'ready' flag to
> indicate the software that it is ready for new commands.
>
> Right now, when we call pwm_config and set the period, we write the
> values to the registers, and t
On Mon, Oct 26, 2015 at 10:32:33PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> This patch changes no code, it just fixes the whitespacing
>
> Signed-off-by: Olliver Schinagl
> ---
> drivers/pwm/pwm-sun4i.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, with a
On Fri, Nov 06, 2015 at 04:46:54PM +0100, Olliver Schinagl wrote:
> Hey Thierry,
>
> On 06-11-15 16:18, Thierry Reding wrote:
> >On Mon, Oct 26, 2015 at 10:32:39PM +0100, Olliver Schinagl wrote:
> >>From: Olliver Schinagl
> >>
> >>Some hardware PWM'
On Mon, Oct 26, 2015 at 10:32:38PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> This patch adds a bit-banging gpio PWM driver. It makes use of hrtimers,
> to allow nano-second resolution, though it obviously strongly depends on
> the switching speed of the gpio pins, hrtimer and sy
On Mon, Oct 26, 2015 at 10:32:39PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> Some hardware PWM's have the possibility to only send out one (or more)
> pulses. This can be quite a useful feature in case one wants or needs
> only a single pulse, but at the exact width.
>
> Additi
On Mon, Oct 26, 2015 at 10:32:37PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> For the npwm property the pwm sysfs interface already made use of the
> DEVICE_ATTR_RO macro. This patch expands this to the other sysfs
> properties so that the code base is concise and makes use of th
On Mon, Oct 26, 2015 at 10:32:36PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> Use the result of pwm_is_enabled directly instead of storing it first.
>
> Signed-off-by: Olliver Schinagl
> ---
> drivers/pwm/sysfs.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Appli
On Mon, Oct 26, 2015 at 10:32:35PM +0100, Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> The pwm header defines bits manually while there is a nice bitops.h with
> a BIT() macro. Use the BIT() macro to set bits in pwm.h
>
> Signed-off-by: Olliver Schinagl
> ---
> include/linux/pwm.h | 7
On Tue, Oct 06, 2015 at 08:28:28PM +0900, Yoshihiro Shimoda wrote:
> The compatible should be "renesas,pwm-rcar", and one the the SoC
> specific string. So, this patch revises the documentation.
>
> Reported-by: Rob Herring
> Signed-off-by: Yoshihiro Shimoda
> ---
> Documentation/devicetree/bin
On Sun, Oct 11, 2015 at 11:49:57AM +0200, Hans de Goede wrote:
> The pwm controller on sun5i SoCs is identical to the one found on sun7i
> SoCs. On the A13 package only one of the 2 pins is routed to the outside,
> so only advertise one pwm there.
>
> Signed-off-by: Hans de Goede
> ---
> .../dev
want to be copied on all of bindings/display/. So I've
> dropped them.
>
> Reported-by: Thierry Reding
> Cc: Thierry Reding
> Cc: Jianwei Wang
> Cc: Alison Wang
> Cc: Philipp Zabel
> Cc: Mark Yao
> Cc: Benjamin Gaignard
> Cc: Vincent Abriou
> Cc: Jean
From: Thierry Reding
This is the result of my attempt to come up with a correct binding for
the XUSB pad controller found on NVIDIA Tegra SoCs. Note how this is a
completely new binding document. The old binding, which we should mark
deprecated if we settle on this new one, modelled the device
From: Thierry Reding
Extend the binding to cover the set of feature found in Tegra210.
Signed-off-by: Thierry Reding
---
.../bindings/phy/nvidia,tegra-xusb-padctl.txt | 330 +
1 file changed, 330 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/nvidia
From: Thierry Reding
The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a
set of lanes that are used for PCIe, SATA and USB.
Signed-off-by: Thierry Reding
---
.../bindings/phy/nvidia,tegra-xusb-padctl.txt | 359 +
1 file changed, 359 insertions
On Thu, Oct 01, 2015 at 05:12:27PM -0500, Rob Herring wrote:
> This is a quite large renaming to consolidate display related bindings
> into a single "display" directory from various scattered locations of
> video, drm, gpu, fb, mipi, and panel. The prior location was somewhat
> based on the Linux
On Fri, Oct 30, 2015 at 11:40:03AM -0500, Rob Herring wrote:
> On Fri, Oct 30, 2015 at 9:20 AM, Maxime Ripard
[...]
> > +Optional properties:
> > + - allwinner,tv-encoder: phandle to the TV Encoder in our pipeline
> > + - allwinner,panel: phandle to the panel used in our RGB interface
>
> Use of
On Fri, Oct 30, 2015 at 03:20:53PM +0100, Maxime Ripard wrote:
> Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
> panel driver.
>
> It is a 480x272 panel connected through a 24-bits RGB interface.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/panel/panel-simpl
On Tue, Jul 28, 2015 at 06:37:40PM -0700, Bjorn Andersson wrote:
> From: Werner Johansson
>
> Signed-off-by: Werner Johansson
> Signed-off-by: Bjorn Andersson
> ---
> .../bindings/panel/sharp,ls043t1le01.txt | 22
> ++
> 1 file changed, 22 insertions(+)
> create
On Wed, Oct 07, 2015 at 11:00:51PM +0200, Maciej S. Szmigiero wrote:
> This patch adds DT bindings for United Radiant Technology
> UMSH-8596MD-xT 7.0" WVGA TFT LCD panels.
>
> Signed-off-by: Maciej Szmigiero
> ---
> Documentation/devicetree/bindings/panel/urt,umsh-8596md.txt | 12
>
On Wed, Oct 07, 2015 at 11:02:20PM +0200, Maciej S. Szmigiero wrote:
> This patch implements support for United Radiant Technology
> UMSH-8596MD-xT 7.0" WVGA TFT LCD panels in DRM panel-simple
> driver.
>
> Signed-off-by: Maciej Szmigiero
> ---
> This replaces "drm: panel-simple: add URT UMSH-859
On Mon, Oct 05, 2015 at 05:25:33PM +0200, Maciej S. Szmigiero wrote:
> Hi Thierry,
>
> On 05.10.2015 13:01, Thierry Reding wrote:
> >> On 01.09.2015 15:50, Maciej S. Szmigiero wrote:
> >>> This patch adds support for United Radiant Technology
> >>&g
On Tue, Aug 18, 2015 at 03:27:54PM +0800, YH Huang wrote:
> Add display PWM driver support to modify backlight for MT8173 and MT6595.
> The PWM has one channel to control the brightness of the display.
> When the (high_width / period) is closer to 1, the screen is brighter;
> otherwise, it is darke
On Tue, Aug 18, 2015 at 03:27:53PM +0800, YH Huang wrote:
> Document the device-tree binding of MediaTek display PWM.
> The PWM has one channel to control the backlight brightness for display.
> It supports MT8173 and MT6595.
>
> Signed-off-by: YH Huang
> ---
> .../devicetree/bindings/pwm/pwm-mt
On Mon, Sep 14, 2015 at 04:47:04PM -0700, Florian Fainelli wrote:
> Hi,
>
> This patch series add PWM support for the Broadcom BCM7xxx
> chips which feature one or more PWM controllers capable of
> output periods from 148ns to ~622ms using a combination of
> variable and fixed frequency settings.
On Wed, Sep 30, 2015 at 05:47:53PM +0900, Yoshihiro Shimoda wrote:
> This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
> R-Car H2 has 7 channels. So, we can use the channels if we describe
> device tree nodes.
>
> Signed-off-by: Yoshihiro Shimoda
> Reviewed-by: Simon Horman
> --
On Wed, Sep 30, 2015 at 05:47:52PM +0900, Yoshihiro Shimoda wrote:
> Add binding document for Renesas PWM Timer on R-Car SoCs.
>
> Signed-off-by: Yoshihiro Shimoda
> Acked-by: Geert Uytterhoeven
> Reviewed-by: Simon Horman
> ---
> .../devicetree/bindings/pwm/renesas,pwm-rcar.txt | 27
>
On Fri, Oct 02, 2015 at 11:40:16PM +0200, Maciej S. Szmigiero wrote:
> Anybody here?
>
> I've already submitted this patch two times but received no response...
>
> Maciej Szmigiero
>
> On 01.09.2015 15:50, Maciej S. Szmigiero wrote:
> > This patch adds support for United Radiant Technology
> >
On Mon, Oct 05, 2015 at 01:33:49AM +0200, Maciej S. Szmigiero wrote:
> Hi Emil,
>
> Thanks for your response,
>
> On 04.10.2015 12:43, Emil Velikov wrote:
> > Hi Maciej,
> >
> > On 2 October 2015 at 22:40, Maciej S. Szmigiero
> > wrote:
> >> Anybody here?
> >>
> >> I've already submitted this p
On Mon, Sep 21, 2015 at 06:27:40PM +0800, Yakir Yang wrote:
> Hi Thierry,
>
> Thanks for your suggest :)
>
> On 09/21/2015 05:15 PM, Thierry Reding wrote:
> >On Mon, Sep 21, 2015 at 04:45:44PM +0800, Yakir Yang wrote:
> >>Hi Heiko,
> >>
> >>On 09/0
On Mon, Sep 21, 2015 at 04:45:44PM +0800, Yakir Yang wrote:
> Hi Heiko,
>
> On 09/02/2015 10:15 AM, Yakir Yang wrote:
> >Hi Heiko,
> >
> >在 09/02/2015 05:47 AM, Heiko Stuebner 写道:
> >>Hi Yakir,
> >>
> >>Am Dienstag, 1. September 2015, 13:46:11 schrieb Yakir Yang:
> >>>The Samsung Exynos eDP co
top to consistently align pin
names.
Thanks,
Thierry
--- >8 ---
From e675c68545ffc4c404cc3f4aa2062b34994efdaf Mon Sep 17 00:00:00 2001
From: Thierry Reding
Date: Tue, 15 Sep 2015 10:29:57 +0200
Subject: [PATCH] ARM: tegra: colibri: Properly align pin names
Align pin names on subsequent lines with the first
o match the "ARM: tegra: "
prefix) and commit messages.
I've also applied the following on top to make pin names consistently
aligned.
Thierry
--- >8 ---
From f330bb512f4f2bff9d7e73f2a39dc265099faefb Mon Sep 17 00:00:00 2001
From: Thierry Reding
Date: Tue, 15 Sep 2015 10:29:57 +0200
On Thu, Aug 27, 2015 at 11:44:48AM +0200, Marcel Ziswiler wrote:
> There were a few cases of eight spaces being used instead of a tab
> character plus one case of using two spaces after an equal sign instead
> of just one which this patch fixes.
>
> Signed-off-by: Marcel Ziswiler
> ---
>
> arch
On Thu, Sep 10, 2015 at 11:45:35AM +0530, Archit Taneja wrote:
>
>
> On 09/08/2015 03:57 PM, Andrzej Hajda wrote:
> >On 09/07/2015 01:46 PM, Archit Taneja wrote:
> >>Thierry,
> >>
> >>On 08/21/2015 11:39 AM, Archit Taneja wrote:
> >>>
&
On Fri, Sep 04, 2015 at 11:20:03AM +0100, Russell King - ARM Linux wrote:
> On Thu, Sep 03, 2015 at 11:04:40AM +0200, Thierry Reding wrote:
> > Conversely, if the panel isn't capable of generating an HPD signal, then
> > I don't think it would be appropriate to make i
On Sun, Sep 06, 2015 at 04:20:39PM +0800, Yakir Yang wrote:
> Hi Rob,
>
> 在 09/05/2015 05:46 AM, Rob Herring 写道:
> >On Wed, Sep 2, 2015 at 11:27 PM, Yakir Yang wrote:
> >>Hi Rob,
> >>
> >>在 09/03/2015 04:17 AM, Rob Herring 写道:
> >>>On Tue, Sep 1, 2015 at 1:14 AM, Yakir Yang wrote:
> Some edp
On Sun, Sep 06, 2015 at 11:59:08AM +0800, Yakir Yang wrote:
> Hi Thierry,
>
> 在 09/03/2015 05:04 PM, Thierry Reding 写道:
> >On Thu, Sep 03, 2015 at 12:27:47PM +0800, Yakir Yang wrote:
> >>Hi Rob,
> >>
> >>在 09/03/2015 04:17 AM, Rob Herring 写道:
> >>
On Fri, Sep 04, 2015 at 11:29:30PM +0200, Heiko Stuebner wrote:
> Am Freitag, 4. September 2015, 16:06:02 schrieb Rob Herring:
> > On Tue, Sep 1, 2015 at 3:46 PM, Heiko Stuebner wrote:
> > > Am Dienstag, 1. September 2015, 13:49:58 schrieb Yakir Yang:
> > >> Split the dp core driver from exynos di
On Thu, Sep 03, 2015 at 04:55:59PM -0500, Rob Herring wrote:
> On Thu, Sep 3, 2015 at 3:47 AM, Thierry Reding wrote:
> > On Wed, Sep 02, 2015 at 03:17:57PM -0500, Rob Herring wrote:
> > [...]
> >> Are there any eDP panels which don't have EDID and need panel deta
On Thu, Sep 03, 2015 at 12:27:47PM +0800, Yakir Yang wrote:
> Hi Rob,
>
> 在 09/03/2015 04:17 AM, Rob Herring 写道:
> >On Tue, Sep 1, 2015 at 1:14 AM, Yakir Yang wrote:
> >>Some edp screen do not have hpd signal, so we can't just return
> >>failed when hpd plug in detect failed.
> >This is a propert
On Wed, Sep 02, 2015 at 03:17:57PM -0500, Rob Herring wrote:
[...]
> Are there any eDP panels which don't have EDID and need panel details in DT?
Most panels need information other than EDID. They typically have some
requirements regarding the power up sequence that aren't to be found
anywhere in
On Wed, Sep 02, 2015 at 06:02:25PM +0800, Yakir Yang wrote:
> 在 2015/9/2 16:34, Thierry Reding 写道:
[...]
> >At the very least your code must compile when applied against a recent
> >upstream tree. I would also expect you to make sure the code works at
> >runtime, though, cont
On Wed, Sep 02, 2015 at 10:06:36AM +0800, Yakir Yang wrote:
> 在 09/02/2015 05:00 AM, Heiko Stuebner 写道:
> >Am Dienstag, 1. September 2015, 14:01:48 schrieb Yakir Yang:
[...]
> >>diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> >>b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 34b78e7.
On Wed, Aug 26, 2015 at 01:52:29PM +0200, Daniel Vetter wrote:
> On Tue, Aug 25, 2015 at 04:42:18PM -0400, Rob Clark wrote:
> > On Mon, Aug 24, 2015 at 9:47 AM, Rob Herring wrote:
> > > On Mon, Aug 17, 2015 at 1:30 PM, Eric Anholt wrote:
> > >> Stephen Warren writes:
> > >>
> > >>> On 08/12/2015
On Fri, Aug 14, 2015 at 10:38:54PM -0600, Stephen Warren wrote:
> On 08/12/2015 06:56 PM, Eric Anholt wrote:
> > Signed-off-by: Eric Anholt
>
> This one definitely needs a patch description, since someone might not
> know what a VC4 is, and "git log" won't show the text from the binding
> doc its
On Tue, Aug 25, 2015 at 10:03:52PM +0800, Yakir Yang wrote:
> Hi Thierry,
>
> 在 2015/8/25 17:58, Thierry Reding 写道:
> >On Wed, Aug 19, 2015 at 09:50:34AM -0500, Yakir Yang wrote:
> >[...]
> >>+ -analogix,color-space:
> >>+ input video data format
On Tue, Aug 25, 2015 at 09:48:01PM +0800, Yakir Yang wrote:
> Hi Thierry & Rob,
>
> 在 2015/8/25 21:27, Rob Herring 写道:
> >On Tue, Aug 25, 2015 at 4:15 AM, Thierry Reding wrote:
> >>On Sun, Aug 23, 2015 at 06:23:14PM -0500, Rob Herring wrote:
> >>>On
On Tue, Aug 25, 2015 at 10:29:39AM +0100, Russell King - ARM Linux wrote:
> On Tue, Aug 25, 2015 at 11:12:48AM +0200, Thierry Reding wrote:
> > On Mon, Aug 24, 2015 at 09:48:27AM -0500, Rob Herring wrote:
> > > It goes beyond bindings IMO. The use of the component framework or
On Tue, Aug 25, 2015 at 05:41:19PM +0800, Yakir Yang wrote:
> Hi Thierry,
>
> 在 2015/8/25 17:12, Thierry Reding 写道:
> >On Mon, Aug 24, 2015 at 09:48:27AM -0500, Rob Herring wrote:
> >>On Mon, Aug 24, 2015 at 7:57 AM, Russell King - ARM Linux
> >> wrote:
> &
On Wed, Aug 19, 2015 at 09:50:34AM -0500, Yakir Yang wrote:
[...]
> + -analogix,color-space:
> + input video data format.
> + COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
I don't think DT is an appropriate place to set this. To my knowledge
this depends
On Sun, Aug 23, 2015 at 06:23:14PM -0500, Rob Herring wrote:
> On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang wrote:
[...]
> > + -analogix,link-rate:
> > + max link rate supported by the eDP controller.
> > + LINK_RATE_1_62GBPS = 0x6, LINK_RATE_2_70GBPS = 0x0
On Mon, Aug 24, 2015 at 09:48:27AM -0500, Rob Herring wrote:
> On Mon, Aug 24, 2015 at 7:57 AM, Russell King - ARM Linux
> wrote:
> > On Sun, Aug 23, 2015 at 06:23:14PM -0500, Rob Herring wrote:
> >> On Wed, Aug 19, 2015 at 9:50 AM, Yakir Yang wrote:
> >> > + -analogix,color-depth:
> >> > +
On Fri, Aug 21, 2015 at 08:24:16PM +0900, Jingoo Han wrote:
> On 2015. 8. 21., at PM 7:01, Yakir Yang wrote:
> >
> > Hi Jingoo,
> >
> >> 在 2015/8/21 16:20, Jingoo Han 写道:
> >>> On 2015. 8. 19., at PM 11:48, Yakir Yang wrote:
> >>
> >> .
> >>
> >>> .../bindings/video/analogix_dp-rockchip.t
On Wed, Aug 19, 2015 at 01:13:59PM +0900, Yoshihiro Shimoda wrote:
> This patch adds support for R-Car SoCs PWM Timer. The PWM timer of
> R-Car H2 has 7 channels. So, we can use the channels if we describe
> device tree nodes.
>
> Signed-off-by: Yoshihiro Shimoda
> Reviewed-by: Simon Horman
> --
On Thu, Aug 06, 2015 at 05:55:58PM -0700, Florian Fainelli wrote:
> Add support for the BCM7038-style PWM controller found in all BCM7xxx STB
> SoCs.
> This controller has a hardcoded 2 channels per controller, and cascades a
> variable frequency generator on top of a fixed frequency generator whi
On Thu, Aug 06, 2015 at 05:55:57PM -0700, Florian Fainelli wrote:
> Add a binding documentation for the Broadcom BCM7038 PWM controller found in
> BCM7xxx chips.
>
> Signed-off-by: Florian Fainelli
> ---
> .../devicetree/bindings/pwm/brcm,bcm7038-pwm.txt | 22
> ++
> 1 fil
Sorry for taking an awful long time to get around to this. The driver
looks generally okay, but I have a few minor comments...
On Mon, Jun 15, 2015 at 06:08:44PM +0900, Yoshihiro Shimoda wrote:
> This patch adds support for R-Car SoCs PWM Timer.
This could be a little more verbose. You could say
On Mon, Jul 20, 2015 at 04:17:15PM +0800, YH Huang wrote:
> Document the device-tree binding of MediatTek display PWM.
I already mentioned this a while back: s/MediatTek/MediaTek/.
Thierry
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On Mon, Jul 20, 2015 at 04:17:16PM +0800, YH Huang wrote:
> Add display PWM driver support to modify backlight for MT8173 and MT6595.
> The PWM has one channel to control the brightness of the display.
> When the (high_width / period) is closer to 1, the screen is brighter;
> otherwise, it is darke
On Tue, Jul 14, 2015 at 10:29:53AM +0200, Tomeu Vizoso wrote:
> Hello,
>
> these three patches make sure that there's an explicit dependency from
> the GPIO chip in Tegra SoCs to the corresponding pinctrl device, without
> having duplicated gpio ranges.
>
> By having an explicit dependency, we ca
On Wed, Jun 10, 2015 at 06:44:23PM +0200, Gary Bisson wrote:
> Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
> driver.
>
> The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
> LCD interface. It supports pixel clocks in the range of 30-40 MHz.
>
> This panel
On Wed, Jun 10, 2015 at 06:44:22PM +0200, Gary Bisson wrote:
> This patch adds vendor prefix for Okaya Electronic America, a provider
> of LCD modules and display technologies.
>
> Signed-off-by: Gary Bisson
> ---
> Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
> 1 file changed, 1
On Wed, Jul 29, 2015 at 04:30:02PM +0800, Jianwei Wang wrote:
> This adds support for the NEC NL4827HC19-05B 480x272 panel to the DRM
> simple panel driver.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Xiubo Li
> Signed-off-by: Jianwei Wang
> Acked-by: Daniel Vetter
> ---
> .../bindings/pa
On Wed, Jul 29, 2015 at 04:30:02PM +0800, Jianwei Wang wrote:
> This adds support for the NEC NL4827HC19-05B 480x272 panel to the DRM
> simple panel driver.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Xiubo Li
> Signed-off-by: Jianwei Wang
> Acked-by: Daniel Vetter
> ---
> .../bindings/pa
On Mon, Aug 10, 2015 at 12:59:22PM +0100, Srinivas Kandagatla wrote:
> This patch updates the bindings to discourage the usage of non standard
> gpio properites, this will help in projects focused on upstreaming.
That last part is an odd comment to make in the commit message of a
patch submitted u
On Tue, Jul 28, 2015 at 09:30:04AM +0100, Jon Hunter wrote:
>
> On 17/07/15 11:41, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> >
> > On Mon, Jul 13, 2015 at 01:39:48PM +0100, Jon Hunter wrote:
> >> Add support to the tegra dc driver for generic PM
On Mon, Jul 20, 2015 at 12:59:41PM +0300, Peter De Schrijver wrote:
> On Fri, Jul 17, 2015 at 01:31:24PM +0200, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> >
> > On Fri, Jul 17, 2015 at 01:20:49PM +0300, Peter De Schrijver wrote:
> > > On Fri, Ju
On Mon, Jul 20, 2015 at 09:46:02AM +0100, Jon Hunter wrote:
>
> On 17/07/15 12:31, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> >
> > On Fri, Jul 17, 2015 at 01:20:49PM +0300, Peter De Schrijver wrote:
> >> On Fri, Jul 17, 2015 at 11:57:55AM +0200,
On Fri, Jul 17, 2015 at 01:20:49PM +0300, Peter De Schrijver wrote:
> On Fri, Jul 17, 2015 at 11:57:55AM +0200, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> >
> > On Mon, Jul 13, 2015 at 01:39:40PM +0100, Jon Hunter wrote:
> > > The Tegra memory control
> Update the tegra_powergate_power_on_legacy/off_legacy() APIs so that
> internally they call the same tegra_powergate_xxx functions that are
> used by the tegra generic power domain code for consistency.
>
> This is based upon work by Thierry Reding
> and Vince Hsu .
>
> Signed-off-by: Jon Hunt
On Mon, Jul 13, 2015 at 01:39:49PM +0100, Jon Hunter wrote:
> Add support to the tegra PCI driver for generic PM domains. However,
> to ensure backward compatibility with older device tree blobs ensure
> that the driver can work with or without generic PM domains. In order
> to migrate to generic P
On Mon, Jul 13, 2015 at 01:39:48PM +0100, Jon Hunter wrote:
> Add support to the tegra dc driver for generic PM domains. However,
> to ensure backward compatibility with older device tree blobs ensure
> that the driver can work with or without generic PM domains. In order
> to migrate to generic PM
On Mon, Jul 13, 2015 at 01:39:46PM +0100, Jon Hunter wrote:
> The following clean-ups have been made to the PMC code:
>
> 1. Add a macro for determining the state of a PMC powergate
> 2. Use the readx_poll_timeout() function instead of implementing a local
>polling loop with a timeout.
> 3. Us
On Mon, Jul 13, 2015 at 01:39:45PM +0100, Jon Hunter wrote:
> Currently, the function tegra_powergate_set() simply sets the desired
> powergate state but does not wait for the state to change. In some
> circumstances this can be desirable. However, in most cases we should
> wait for the state to ch
On Mon, Jul 13, 2015 at 01:39:42PM +0100, Jon Hunter wrote:
> From: Vince Hsu
>
> This patch adds the hot reset register table and flush related callback
> functions for Tegra114.
>
> Signed-off-by: Vince Hsu
> [jonath...@nvidia.com: Removed tegra_mc_ops and added
> metastable_flush_reads.]
>
On Mon, Jul 13, 2015 at 01:39:43PM +0100, Jon Hunter wrote:
> From: Vince Hsu
>
> This patch adds the hot reset register table and flush related callback
> functions for Tegra124.
>
> Signed-off-by: Vince Hsu
> [jonath...@nvidia.com: Removed tegra_mc_ops and added
> metastable_flush_reads.]
>
On Mon, Jul 13, 2015 at 01:39:41PM +0100, Jon Hunter wrote:
> From: Vince Hsu
>
> This patch adds the hot reset register table and flush related callback
> functions for Tegra30.
>
> Signed-off-by: Vince Hsu
> [jonath...@nvidia.com: Removed tegra_mc_ops and added
> metastable_flush_reads.]
> S
On Mon, Jul 13, 2015 at 01:39:40PM +0100, Jon Hunter wrote:
> The Tegra memory controller implements a flush feature to flush pending
> accesses and prevent further accesses from occurring. This feature is
> used when powering down IP blocks to ensure the IP block is in a good
> state. The flushes
On Mon, Jul 13, 2015 at 01:39:52PM +0100, Jon Hunter wrote:
> Add power-domain binding documentation for the NVIDIA PMC driver in
> order to support generic power-domains.
>
> Signed-off-by: Jon Hunter
> ---
> .../bindings/arm/tegra/nvidia,tegra20-pmc.txt | 99
> ++
> 1
On Mon, Jul 13, 2015 at 01:39:56PM +0100, Jon Hunter wrote:
> From: Vince Hsu
>
> Add power supply information which is board dependent for GK20A.
>
> Signed-off-by: Vince Hsu
> Signed-off-by: Jon Hunter
> ---
> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 6 +-
> 1 file changed, 5 inserti
On Mon, Jul 13, 2015 at 10:35:45AM -0700, Kyle Huey wrote:
> This patch modifies the device tree for tegra124 based devices to enable
> the Cortex A15 PMU. The interrupt numbers are taken from NVIDIA TRM
> DP-06905-001_v03p. This patch was tested on a Jetson TK1.
>
> Updated for proper ordering
On Thu, Jul 16, 2015 at 11:10:29AM +, Wang J.W. wrote:
[...]
> > -Original Message-
> > From: Thierry Reding [mailto:thierry.red...@gmail.com]
[...]
> > On Mon, Jul 13, 2015 at 06:51:29PM +0800, Jianwei Wang wrote:
[...]
> > > DRM DRIVERS FOR NVIDIA TE
On Mon, Jul 13, 2015 at 06:51:31PM +0800, Jianwei Wang wrote:
> Add DCU node, DCU is a display controller of Freescale
> named 2D-ACE.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Xiubo Li
> Signed-off-by: Jianwei Wang
> Reviewed-by: Alison Wang
> ---
> .../devicetree/bindings/drm/fsl-dcu/
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