isc.
>
> Thanks,
> Fengguang
>
> On Mon, Sep 14, 2015 at 03:02:27AM +, Yuantian Tang wrote:
> > Hello Tejun,
> >
> > The toolchain I used is:
> > gcc version 4.8.3 20140401 (prerelease) (Linaro GCC 4.8-2014.04)
> >
> > I have not found this
able warnings
>
> Hello, Yuantian.
>
> On Fri, Sep 11, 2015 at 05:27:25AM +, Yuantian Tang wrote:
> > Hi Tejun,
> >
> > Could you please take the version 1 patch?
> > The version 2 patch can't address these warnings, and the version 1 can
> definitely re
Hi Tejun,
Could you please take the version 1 patch?
The version 2 patch can't address these warnings, and the version 1 can
definitely remove them.
In this case, that would cause any hidden bugs, so no worries.
Regards,
Yuantian
> -Original Message-
> From: Tejun Heo [mailto:hte...@gma
> -Original Message-
> From: Tejun Heo [mailto:hte...@gmail.com] On Behalf Of Tejun Heo
> Sent: Wednesday, September 09, 2015 10:02 PM
> To: Tang Yuantian-B29983
> Cc: hdego...@redhat.com; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; devicetree@vger.kernel.org
> Subject: R
> -Original Message-
> From: pku@gmail.com [mailto:pku@gmail.com] On Behalf Of Li Yang
> Sent: Thursday, September 10, 2015 7:19 AM
> To: Tang Yuantian-B29983
> Cc: Hans de Goede ; t...@kernel.org; linux-
> i...@vger.kernel.org; lkml ;
> devicetree@vger.kernel.org
> Subject: Re:
From: Tang Yuantian
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.
The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.
S
> > > > > In any case, if "qoriq" makes sense for the compatible, I don't
> > > > > see why it doesn't make sense for the driver.
> > > > >
> > > > So, "Corenet" is appropriate for driver.
> > > > If something should change, that must be compatible string.
> > >
> > > No. Corenet is a bus intercon
> -Original Message-
> From: Wood Scott-B07421
> Sent: 2014年1月24日 星期五 10:36
> To: Tang Yuantian-B29983
> Cc: ga...@kernel.crashing.org; linuxppc-...@lists.ozlabs.org;
> devicetree@vger.kernel.org; Kushwaha Prabhakar-B32579
> Subject: Re: [PATCH] clk: corenet: Update the clock bindings
>
>
> > > Instead, how about a note like this near the top of the file:
> > >
> > > All references to "1.0" and "2.0" refer to the QorIQ chassis version
> > > to which the chip complies.
> > >
> > > Chassis Version Example Chips
> > > --- -
> > > 1.0
> -Original Message-
> From: Wood Scott-B07421
> Sent: 2014年1月23日 星期四 8:44
> To: Tang Yuantian-B29983
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc-
> d...@lists.ozlabs.org; devicetree@vger.kernel.org; Kushwaha Prabhakar-
> B32579
> Subject: Re: [PATCH] clk: corenet: Update t
> -Original Message-
> From: Wood Scott-B07421
> Sent: 2014年1月18日 星期六 9:06
> To: Tang Yuantian-B29983
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; mark.rutl...@arm.com;
> devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org; Li Yang-Leo-
> R58472
> Subject: Re: [PATCH v9] clk:
Thanks for your review.
Thanks,
Yuantian
> -Original Message-
> From: Wood Scott-B07421
> Sent: 2014年1月11日 星期六 4:20
> To: Tang Yuantian-B29983
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; mark.rutl...@arm.com;
> devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org; Li Yang-Leo
e: 答复: [v7] clk: corenet: Adds the clock binding
> > >
> > > On Wed, 2014-01-08 at 09:30 +, Mark Rutland wrote:
> > > > On Wed, Jan 08, 2014 at 08:53:56AM +, Yuantian Tang wrote:
> > > > >
> > > > >
g
> Subject: Re: 答复: [v7] clk: corenet: Adds the clock binding
>
> On Wed, 2014-01-08 at 09:30 +, Mark Rutland wrote:
> > On Wed, Jan 08, 2014 at 08:53:56AM +, Yuantian Tang wrote:
> > >
> > >
> > > 发件人:
PING.
Thanks,
Yuantian
> -Original Message-
> From: Tang Yuantian-B29983
> Sent: 2013年11月20日 星期三 17:05
> To: ga...@kernel.crashing.org
> Cc: devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org;
> mark.rutl...@arm.com; Wood Scott-B07421; grant.lik...@secretlab.ca; Tang
> Yuantian-B29
Hi Scott,
Do you have any comments about this patch? If not, please pick it up.
Thanks,
Yuantian
> -Original Message-
> From: Tang Yuantian-B29983
> Sent: 2013年11月20日 星期三 17:05
> To: ga...@kernel.crashing.org
> Cc: devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org;
> mark.rutl...@
> > +++ b/Documentation/devicetree/bindings/clock/corenet-clock.txt
> > @@ -0,0 +1,123 @@
> > +* Clock Block on Freescale CoreNet Platforms
> > +
> > +Freescale CoreNet chips take primary clocking input from the external
> > +SYSCLK signal. The SYSCLK input (frequency) is multiplied using
> > +mult
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