Catalin Marinas writes:
> On Thu, Jul 02, 2015 at 08:26:02PM +, Chalamarla, Tirumalesh wrote:
>> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla
>> > wrote:
>> >
>> > From: Tirumalesh Chalamarla
>> >
>> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
>> > T
On Thu, Jul 02, 2015 at 08:26:02PM +, Chalamarla, Tirumalesh wrote:
> > On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla
> > wrote:
> >
> > From: Tirumalesh Chalamarla
> >
> > The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> > Thunder SoCs by adding an entry to D
Hi Catalin,
is it possible to pull this for 4.2?
Thanks,
Tirumalesh.
> On Jun 26, 2015, at 12:12 PM, Tirumalesh Chalamarla
> wrote:
>
> From: Tirumalesh Chalamarla
>
> The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
> Thunder SoCs by adding an entry to DT.
>
> Signe
From: Tirumalesh Chalamarla
The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.
Signed-off-by: Tirumalesh Chalamarla
Acked-by: Marc Zyngier
---
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +
1 file changed, 9 insertions(+)
From: Tirumalesh Chalamarla
The PCIe host controller uses MSIs provided by GICv3 ITS. Enable it on
Thunder SoCs by adding an entry to DT.
Signed-off-by: Tirumalesh Chalamarla
---
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm6