On Thu, Aug 27, 2015 at 12:44:20PM +0100, Bharat Kumar Gogada wrote:
> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
>
> Signed-off-by: Bharat Kumar Gogada
> Signed-off-by: Ravi Kiran Gummaluri
> ---
> .../devicetree/bindings/pci/xilinx-nwl-pcie.txt| 39 +
> drivers/pci/host
Hi Bharat,
I'm resending this since you sent a ping three days after I responded,
so I don't know whether you got this the first time around.
DMARC got turned on for mail coming from @google.com, which apparently
caused some email providers to drop it. I switched to sending from
helg...@kernel.o
Gogada;
Ravikiran Gummaluri
Subject: [PATCH] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host
Controller
Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
Signed-off-by: Bharat Kumar Gogada
Signed-off-by: Ravi Kiran Gummaluri
---
.../devicetree/bindings/pci/xilinx-nwl
Hi Bharat,
On Thu, Aug 27, 2015 at 05:14:20PM +0530, Bharat Kumar Gogada wrote:
> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
> diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
> index 140d66f..0f3a789 100644
> --- a/drivers/pci/host/Makefile
> +++ b/drivers/pci/
Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
Signed-off-by: Bharat Kumar Gogada
Signed-off-by: Ravi Kiran Gummaluri
---
.../devicetree/bindings/pci/xilinx-nwl-pcie.txt| 39 +
drivers/pci/host/Kconfig |9 +
drivers/pci/host/Makefile
