On 24/02/15 06:34, Pranavkumar Sawargaonkar wrote:
Hi Rob,
On Mon, Feb 23, 2015 at 10:09 PM, Rob Herring robherri...@gmail.com wrote:
On Mon, Feb 23, 2015 at 6:07 AM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Sat, Feb 21, 2015 at 03:56:17PM -0600, Rob Herring wrote:
On Thu,
[adding RobH to the CC list, as he was commenting on the subject earlier]
Hi Pranav,
On 12/03/15 03:52, Pranavkumar Sawargaonkar wrote:
Hi Marc,
On Wed, Mar 11, 2015 at 11:47 PM, Marc Zyngier marc.zyng...@arm.com wrote:
On 11/03/15 17:57, Feng Kan wrote:
On Wed, Mar 11, 2015 at 10:31 AM,
On Wed, Mar 11, 2015 at 7:53 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 27/01/15 07:03, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size
On 27/01/15 07:03, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for VCPU Control and
VCPU register.
On Wed, Mar 11, 2015 at 10:31 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 11/03/15 17:19, Feng Kan wrote:
On Wed, Mar 11, 2015 at 7:53 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 27/01/15 07:03, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the
On 11/03/15 17:19, Feng Kan wrote:
On Wed, Mar 11, 2015 at 7:53 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 27/01/15 07:03, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is
On 11/03/15 17:57, Feng Kan wrote:
On Wed, Mar 11, 2015 at 10:31 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 11/03/15 17:19, Feng Kan wrote:
On Wed, Mar 11, 2015 at 7:53 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 27/01/15 07:03, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC
Hi Marc,
On Wed, Mar 11, 2015 at 11:47 PM, Marc Zyngier marc.zyng...@arm.com wrote:
On 11/03/15 17:57, Feng Kan wrote:
On Wed, Mar 11, 2015 at 10:31 AM, Marc Zyngier marc.zyng...@arm.com wrote:
On 11/03/15 17:19, Feng Kan wrote:
On Wed, Mar 11, 2015 at 7:53 AM, Marc Zyngier
Hi Rob,
On Tue, Feb 24, 2015 at 8:00 PM, Rob Herring robherri...@gmail.com wrote:
On Tue, Feb 24, 2015 at 12:34 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
Hi Rob,
On Mon, Feb 23, 2015 at 10:09 PM, Rob Herring robherri...@gmail.com wrote:
On Mon, Feb 23, 2015 at 6:07 AM,
On Tue, Feb 24, 2015 at 12:34 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
Hi Rob,
On Mon, Feb 23, 2015 at 10:09 PM, Rob Herring robherri...@gmail.com wrote:
On Mon, Feb 23, 2015 at 6:07 AM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Sat, Feb 21, 2015 at 03:56:17PM
Sorry about top post. Quick comment in reply to Seattle point below - yes, it
does indeed support 64K and already has the right DTS.
--
Computer Architect | Sent from my #ARM Powered Mobile Device
On Feb 23, 2015 4:14 AM, Christoffer Dall christoffer.d...@linaro.org wrote:
On Sat, Feb 21,
On Sat, Feb 21, 2015 at 03:56:17PM -0600, Rob Herring wrote:
On Thu, Feb 19, 2015 at 1:03 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Thu, Feb 19, 2015 at 12:23:15PM -0600, Rob Herring wrote:
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com
On Mon, Feb 23, 2015 at 6:07 AM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Sat, Feb 21, 2015 at 03:56:17PM -0600, Rob Herring wrote:
On Thu, Feb 19, 2015 at 1:03 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Thu, Feb 19, 2015 at 12:23:15PM -0600, Rob Herring wrote:
Hi Rob,
On Mon, Feb 23, 2015 at 10:09 PM, Rob Herring robherri...@gmail.com wrote:
On Mon, Feb 23, 2015 at 6:07 AM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Sat, Feb 21, 2015 at 03:56:17PM -0600, Rob Herring wrote:
On Thu, Feb 19, 2015 at 1:03 PM, Christoffer Dall
On Thu, Feb 19, 2015 at 1:03 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
On Thu, Feb 19, 2015 at 12:23:15PM -0600, Rob Herring wrote:
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
In APM X-Gene, GIC register space is 64K aligned while the
On 22 February 2015 at 06:56, Rob Herring robherri...@gmail.com wrote:
On Thu, Feb 19, 2015 at 1:03 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
It matters if you want to ensure that the 64K page you are assigning to
a guest for the GIC virtual CPU interface contains only GIC
On Tue, Jan 27, 2015 at 12:33:26PM +0530, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for VCPU Control
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for
On Thu, Feb 19, 2015 at 12:23:15PM -0600, Rob Herring wrote:
On Tue, Jan 27, 2015 at 1:03 AM, Pranavkumar Sawargaonkar
psawargaon...@apm.com wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with
Hi,
On Tue, Jan 27, 2015 at 3:02 PM, Jon Masters j...@redhat.com wrote:
On 01/27/2015 02:03 AM, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to
On 01/27/2015 02:03 AM, Pranavkumar Sawargaonkar wrote:
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for VCPU Control and
VCPU register.
In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned
in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page
size due to size alignment checking in vgic driver for VCPU Control and
VCPU register.
This patch corrects the sizes to be inline with the
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