On Wed, Jul 15, 2015 at 02:38:46PM +0800, Pi-Cheng Chen wrote:
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Hi Mike and Stephen,
since the MT8173 cpufreq driver is likely going
From: pi-cheng.chen pi-cheng.c...@linaro.org
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching.
Signed-off-by: Pi-Cheng Chen pi-cheng.c...@linaro.org
Reviewed-by: Daniel Kurtz djku...@chromium.org
---
Changes in v4:
- Address
On 11 March 2015 at 05:43, Mike Turquette mturque...@linaro.org wrote:
Sorry, I am not who you asked for advice but I will chime in anyways ;-)
Always welcome :)
I really hate this intermediate frequency stuff in cpufreq. As we
I am starting to :)
Furthermore any intermediate-frequency
On 11 March 2015 at 05:29, Mike Turquette mturque...@linaro.org wrote:
I assume you are saying that you want to update loops-per-jiffie while
at an intermediate frequency. Why? This operation should not take very
long.
Imagine a (hypothetical?) processor that changes frequency in many small
On Thu, Mar 05, 2015 at 04:32:06PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 16:21, Sascha Hauer s.ha...@pengutronix.de wrote:
Given the variance of different SoCs I don't think it makes sense
to try to handle all these cases. Instead the cpufreq-dt driver
should just call
On Tue, Mar 10, 2015 at 3:55 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Tue, Mar 10, 2015 at 09:53:19AM +0800, Pi-Cheng Chen wrote:
On 5 March 2015 at 15:42, Sascha Hauer s.ha...@pengutronix.de wrote:
My suggestion is to take another approach. Implement clk_set_rate for
these muxes
On Tue, Mar 10, 2015 at 09:53:19AM +0800, Pi-Cheng Chen wrote:
On 5 March 2015 at 15:42, Sascha Hauer s.ha...@pengutronix.de wrote:
My suggestion is to take another approach. Implement clk_set_rate for
these muxes and in the set_rate hook:
- switch mux to intermediate PLL parent
-
Quoting Viresh Kumar (2015-03-05 00:59:50)
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate. What you are
Quoting Viresh Kumar (2015-03-05 03:02:06)
On 5 March 2015 at 16:21, Sascha Hauer s.ha...@pengutronix.de wrote:
Given the variance of different SoCs I don't think it makes sense
to try to handle all these cases. Instead the cpufreq-dt driver
should just call clk_set_rate() on the CPU clock
On 5 March 2015 at 15:42, Sascha Hauer s.ha...@pengutronix.de wrote:
+Cc Viresh Kumar
Viresh, this is the patch for the underlying clocks for the Mediatek
cpufreq driver.
On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate.
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate. What you are interested in is changing the
parent, so use
On 5 March 2015 at 15:42, Sascha Hauer s.ha...@pengutronix.de wrote:
+Cc Viresh Kumar
Viresh, this is the patch for the underlying clocks for the Mediatek
cpufreq driver.
On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer
On 5 March 2015 at 18:51, Sascha Hauer s.ha...@pengutronix.de wrote:
On Thu, Mar 05, 2015 at 05:39:12PM +0800, Pi-Cheng Chen wrote:
On 5 March 2015 at 17:19, Sascha Hauer s.ha...@pengutronix.de wrote:
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12,
On 5 March 2015 at 14:49, Sascha Hauer s.ha...@pengutronix.de wrote:
The sequence to change the CPU frequency on the Mediatek SoCs is like this:
- Change CPU from CPU PLL to another clock source (intermediate source)
- Change CPU PLL frequency
- wait until PLL has settled
- switch back to
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the former for changing the parent and the latter
for changing the rate.
On 5 March 2015 at 16:21, Sascha Hauer s.ha...@pengutronix.de wrote:
Given the variance of different SoCs I don't think it makes sense
to try to handle all these cases. Instead the cpufreq-dt driver
should just call clk_set_rate() on the CPU clock with the desired
target frequency. Everything
On Thu, Mar 05, 2015 at 05:39:12PM +0800, Pi-Cheng Chen wrote:
On 5 March 2015 at 17:19, Sascha Hauer s.ha...@pengutronix.de wrote:
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for
On 5 March 2015 at 17:19, Sascha Hauer s.ha...@pengutronix.de wrote:
On Thu, Mar 05, 2015 at 02:29:50PM +0530, Viresh Kumar wrote:
On 5 March 2015 at 13:12, Sascha Hauer s.ha...@pengutronix.de wrote:
We have clk_set_parent for changing the parent and clk_set_rate to
change the rate. Use the
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer s.ha...@pengutronix.de wrote:
On Wed, Mar 04, 2015 at 06:49:11PM +0800, pi-cheng.chen wrote:
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching. This patch is based on Mediatek
+Cc Viresh Kumar
Viresh, this is the patch for the underlying clocks for the Mediatek
cpufreq driver.
On Thu, Mar 05, 2015 at 10:43:21AM +0800, Pi-Cheng Chen wrote:
Hi Sascha,
On 4 March 2015 at 19:21, Sascha Hauer s.ha...@pengutronix.de wrote:
On Wed, Mar 04, 2015 at 06:49:11PM +0800,
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching. This patch is based on Mediatek
clock driver patches[1].
[1] http://thread.gmane.org/gmane.linux.kernel/1892436
Signed-off-by: pi-cheng.chen pi-cheng.c...@linaro.org
---
On Wed, Mar 04, 2015 at 06:49:11PM +0800, pi-cheng.chen wrote:
This patch adds CPU mux clocks which are used by Mediatek cpufreq driver
for intermediate clock source switching. This patch is based on Mediatek
clock driver patches[1].
[1] http://thread.gmane.org/gmane.linux.kernel/1892436
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