On 25.06.2015 14:57, Vaibhav Hiremath wrote:
>
>
> On Thursday 25 June 2015 11:20 AM, Krzysztof Kozlowski wrote:
>> On 25.06.2015 14:44, Vaibhav Hiremath wrote:
>>>
>>>
>>> On Thursday 25 June 2015 11:02 AM, Krzysztof Kozlowski wrote:
On 25.06.2015 14:26, Vaibhav Hiremath wrote:
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>
On Thursday 25 June 2015 11:20 AM, Krzysztof Kozlowski wrote:
On 25.06.2015 14:44, Vaibhav Hiremath wrote:
On Thursday 25 June 2015 11:02 AM, Krzysztof Kozlowski wrote:
On 25.06.2015 14:26, Vaibhav Hiremath wrote:
On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
2015-06-24
On 25.06.2015 14:44, Vaibhav Hiremath wrote:
>
>
> On Thursday 25 June 2015 11:02 AM, Krzysztof Kozlowski wrote:
>> On 25.06.2015 14:26, Vaibhav Hiremath wrote:
>>>
>>>
>>> On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath
:
>
On Thursday 25 June 2015 11:02 AM, Krzysztof Kozlowski wrote:
On 25.06.2015 14:26, Vaibhav Hiremath wrote:
On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath
:
As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
(page 0) controls t
On 25.06.2015 14:26, Vaibhav Hiremath wrote:
>
>
> On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
>> 2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath
>> :
>>> As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
>>> (page 0) controls the method of clearing interrupt
>>> status of 88p
On Thursday 25 June 2015 05:33 AM, Krzysztof Kozlowski wrote:
2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath :
As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
(page 0) controls the method of clearing interrupt
status of 88pm800 family of devices;
0: clear on read
1: clear on write
2015-06-24 18:21 GMT+09:00 Vaibhav Hiremath :
> As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
> (page 0) controls the method of clearing interrupt
> status of 88pm800 family of devices;
>
> 0: clear on read
> 1: clear on write
>
> This patch allows to configure this field, through DT.
As per the spec, bit 1 (INT_CLEAR_MODE) of reg addr 0xe
(page 0) controls the method of clearing interrupt
status of 88pm800 family of devices;
0: clear on read
1: clear on write
This patch allows to configure this field, through DT.
Also, as suggested by "Lee Jones" renaming DT property and