On Wed, Nov 25, 2015 at 1:37 PM, Simon Arlott wrote:
> On Wed, November 25, 2015 10:44, Jonas Gorski wrote:
>> On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott wrote:
>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>> registers. It also has a clock for the NAND contro
On Wed, November 25, 2015 10:44, Jonas Gorski wrote:
> On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
>> enabled.
>>
>> Set up the device b
Hi,
On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>
> Set up the device by enabling the clock, disabling and acking all
> interr
The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.
Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.
Add a brcmnand_get_socdat
