On Tue, Sep 2, 2014 at 5:50 PM, David Daney ddaney.c...@gmail.com wrote:
On 09/02/2014 12:36 PM, Andrew Bresticker wrote:
On Tue, Sep 2, 2014 at 10:27 AM, David Daney ddaney.c...@gmail.com
wrote:
On 08/29/2014 03:14 PM, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC)
On 09/03/2014 04:53 PM, Andrew Bresticker wrote:
On Tue, Sep 2, 2014 at 5:50 PM, David Daney ddaney.c...@gmail.com wrote:
[...]
Your comments don't really make sense to me in the context of my knowledge
of the GIC.
Of course all the CP0 timer and performance counter interrupts are per-CPU
On Tue, Sep 02, 2014 at 01:53:18AM +0100, Andrew Bresticker wrote:
On Mon, Sep 1, 2014 at 4:01 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to
On Tue, Sep 2, 2014 at 2:33 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Tue, Sep 02, 2014 at 01:53:18AM +0100, Andrew Bresticker wrote:
On Mon, Sep 1, 2014 at 4:01 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global
On 08/29/2014 03:14 PM, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
Signed-off-by: Andrew
On Tue, Sep 2, 2014 at 10:27 AM, David Daney ddaney.c...@gmail.com wrote:
On 08/29/2014 03:14 PM, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also
On 09/02/2014 12:36 PM, Andrew Bresticker wrote:
On Tue, Sep 2, 2014 at 10:27 AM, David Daney ddaney.c...@gmail.com wrote:
On 08/29/2014 03:14 PM, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
On 01/09/14 12:01, Mark Rutland wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
+Required properties:
+- compatible : Should be mti,global-interrupt-controller
I couldn't find mti in vendor-prefixes.txt (as of v3.17-rc3). If
there's not a patch to add it elsewhere,
On Mon, Sep 1, 2014 at 4:01 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Aug 29, 2014 at 11:14:30PM +0100, Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt
On Sat, Aug 30, 2014 at 12:53 AM, Arnd Bergmann a...@arndb.de wrote:
On Friday 29 August 2014 15:14:30 Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also
On Friday 29 August 2014 15:14:30 Andrew Bresticker wrote:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
Signed-off-by:
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors. It also supports a timer and software-generated
interrupts.
Signed-off-by: Andrew Bresticker abres...@chromium.org
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