Re: [PATCH 1/2] clk: rockchip: add clock ID for usbphy480m_src

2015-01-12 Thread Heiko Stübner
Am Donnerstag, 13. November 2014, 15:22:36 schrieb Kever Yang: There are 3 different parent clock from different usbphy, all of them are fixed 480MHz, it is not able to auto select by clock core to the 2nd and the 3rd parent. For different use case for different board, we may need to select

Re: [PATCH 1/2] clk: rockchip: add clock ID for usbphy480m_src

2014-12-16 Thread Doug Anderson
Kever, On Wed, Nov 12, 2014 at 11:22 PM, Kever Yang kever.y...@rock-chips.com wrote: There are 3 different parent clock from different usbphy, all of them are fixed 480MHz, it is not able to auto select by clock core to the 2nd and the 3rd parent. For different use case for different board,

[PATCH 1/2] clk: rockchip: add clock ID for usbphy480m_src

2014-11-12 Thread Kever Yang
There are 3 different parent clock from different usbphy, all of them are fixed 480MHz, it is not able to auto select by clock core to the 2nd and the 3rd parent. For different use case for different board, we may need to select different usbphy clock out as parent manually. Add the clock ID for