On Tue, Sep 23, 2014 at 05:10:02PM -0500, Andy Gross wrote:
>
>
> > > + break;
> > > + default:
> > > + achan->slave.src_maxburst = 0;
> > > + achan->slave.dst_maxburst = 0;
> > Why clear these for error cases
>
> With the return I shouldn'
> > + break;
> > + default:
> > + achan->slave.src_maxburst = 0;
> > + achan->slave.dst_maxburst = 0;
> Why clear these for error cases
With the return I shouldn't need to. I'll fix this.
> > + ret = -EINVAL;
> >
On Wed, Sep 10, 2014 at 09:18:52PM -0500, Andy Gross wrote:
> +static int adm_slave_config(struct adm_chan *achan,
> + struct dma_slave_config *cfg)
> +{
> + int ret = 0;
> + u32 burst;
> + struct adm_device *adev = achan->adev;
> +
> + memcpy(&achan->slave, cfg, sizeof
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
controller found in the MSM8960 and IPQ/APQ8064 platforms.
The ADM supports both memory to memory transactions and memory
to/from peripheral device transactions. The controller also provides flow
control capabilities for tran
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA
controller found in the MSM8960 and IPQ/APQ8064 platforms.
The ADM supports both memory to memory transactions and memory
to/from peripheral device transactions. The controller also provides flow
control capabilities for tran
