On 03/07/2014 03:59 PM, Tero Kristo wrote:
On 03/07/2014 03:09 PM, Roger Quadros wrote:
This clock gate description was missing in older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.
Can you provide a document reference here?
On 03/07/2014 03:09 PM, Roger Quadros wrote:
This clock gate description was missing in older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.
Can you provide a document reference here?
-Tero
Use l3init_960m_gfclk as parent of
