Re: [PATCH 3/6] iommu/arm-smmu: add support for iova_to_phys through ATS1PR

2014-09-01 Thread Will Deacon
On Tue, Aug 26, 2014 at 02:54:51PM +0100, Will Deacon wrote: On Tue, Aug 19, 2014 at 07:12:41PM +0100, Mitchel Humpherys wrote: On Tue, Aug 19 2014 at 05:44:32 AM, Will Deacon will.dea...@arm.com wrote: @@ -2005,6 +2073,11 @@ int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)

Re: [PATCH 3/6] iommu/arm-smmu: add support for iova_to_phys through ATS1PR

2014-08-26 Thread Will Deacon
Hi Mitch, On Tue, Aug 19, 2014 at 07:12:41PM +0100, Mitchel Humpherys wrote: On Tue, Aug 19 2014 at 05:44:32 AM, Will Deacon will.dea...@arm.com wrote: We don't have writeq for arch/arm/. Ah yes looks like this is an MSM-ism that never made it upstream since it wouldn't be guaranteed to be

Re: [PATCH 3/6] iommu/arm-smmu: add support for iova_to_phys through ATS1PR

2014-08-19 Thread Will Deacon
On Wed, Aug 13, 2014 at 01:51:36AM +0100, Mitchel Humpherys wrote: Currently, we provide the iommu_ops.iova_to_phys service by doing a table walk in software to translate IO virtual addresses to physical addresses. On SMMUs that support it, it can be useful to ask the SMMU itself to do the

[PATCH 3/6] iommu/arm-smmu: add support for iova_to_phys through ATS1PR

2014-08-12 Thread Mitchel Humpherys
Currently, we provide the iommu_ops.iova_to_phys service by doing a table walk in software to translate IO virtual addresses to physical addresses. On SMMUs that support it, it can be useful to ask the SMMU itself to do the translation. This can be used to warm the TLBs for an SMMU. It can also be