On 08.10.14 17:44:32, Liviu Dudau wrote:
On Wed, Oct 08, 2014 at 09:49:27AM +0100, Robert Richter wrote:
On 07.10.14 16:01:49, Liviu Dudau wrote:
I am quite confused a bit on which is the latest code base now. I was
looking into Bjorn's pci/host-generic and there is a different
On 07.10.14 16:01:49, Liviu Dudau wrote:
On Tue, Oct 07, 2014 at 03:27:44PM +0100, Robert Richter wrote:
On 24.09.14 18:06:04, Arnd Bergmann wrote:
+ compatible = cavium,thunder-pcie;
+ device_type = pci;
+ msi-parent = its;
+
On Wed, Oct 08, 2014 at 09:49:27AM +0100, Robert Richter wrote:
On 07.10.14 16:01:49, Liviu Dudau wrote:
On Tue, Oct 07, 2014 at 03:27:44PM +0100, Robert Richter wrote:
On 24.09.14 18:06:04, Arnd Bergmann wrote:
+ compatible = cavium,thunder-pcie;
+
On 24.09.14 18:06:04, Arnd Bergmann wrote:
+ compatible = cavium,thunder-pcie;
+ device_type = pci;
+ msi-parent = its;
+ bus-range = 0 255;
+ #size-cells = 2;
+ #address-cells = 3;
+
On Tue, Oct 07, 2014 at 03:27:44PM +0100, Robert Richter wrote:
On 24.09.14 18:06:04, Arnd Bergmann wrote:
+ compatible = cavium,thunder-pcie;
+ device_type = pci;
+ msi-parent = its;
+ bus-range = 0 255;
+
Thanks for pointing correction ROB.
Will fix it.
On Fri, Sep 26, 2014 at 11:56 PM, Rob Herring robherri...@gmail.com wrote:
On Wed, Sep 24, 2014 at 11:06 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ pcie0@0x8480, {
The
On Wed, Sep 24, 2014 at 11:06 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ pcie0@0x8480, {
The name should be pci, not pci0.
And the address should be @8480. There was some confusion
about when the comma should
On Thursday 25 September 2014 00:37:00 Sunil Kovvuri wrote:
On Thu, Sep 25, 2014 at 12:04 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 23:34:04 Sunil Kovvuri wrote:
On Wed, Sep 24, 2014 at 9:36 PM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014
On Thu, Sep 25, 2014 at 1:31 AM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 25 September 2014 00:37:00 Sunil Kovvuri wrote:
On Thu, Sep 25, 2014 at 12:04 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 23:34:04 Sunil Kovvuri wrote:
All on-board PCI devices
On Thursday 25 September 2014, Bjorn Helgaas wrote:
On Thu, Sep 25, 2014 at 1:31 AM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 25 September 2014 00:37:00 Sunil Kovvuri wrote:
On Thu, Sep 25, 2014 at 12:04 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 23:34:04
On Thu, Sep 25, 2014 at 1:26 PM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 25 September 2014, Bjorn Helgaas wrote:
On Thu, Sep 25, 2014 at 1:31 AM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 25 September 2014 00:37:00 Sunil Kovvuri wrote:
On Thu, Sep 25, 2014 at 12:04 AM, Arnd
On Thursday 25 September 2014, Bjorn Helgaas wrote:
OK. You said a range that has the nonrelocatable flag set should be
used for IORESOURCE_PCI_FIXED mappings. I thought you meant that the
range was a bridge window, and somehow PCI_FIXED BARs should be put in
that window.
But maybe you
On Thu, Sep 25, 2014 at 2:22 PM, Arnd Bergmann a...@arndb.de wrote:
On Thursday 25 September 2014, Bjorn Helgaas wrote:
OK. You said a range that has the nonrelocatable flag set should be
used for IORESOURCE_PCI_FIXED mappings. I thought you meant that the
range was a bridge window, and
From: Sunil Goutham sgout...@cavium.com
This patch adds the PCIe host controller entry for Cavium Thunder SoCs
to the devicetree. There are 4 internal PCI controllers available.
Signed-off-by: Sunil Goutham sgout...@cavium.com
Signed-off-by: Robert Richter rrich...@cavium.com
---
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ pcie0@0x8480, {
The name should be pci, not pci0.
+ compatible = cavium,thunder-pcie;
+ device_type = pci;
+ msi-parent = its;
+ bus-range = 0 255;
+
On Wed, Sep 24, 2014 at 9:36 PM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ pcie0@0x8480, {
The name should be pci, not pci0.
Thanks, will change.
+ compatible = cavium,thunder-pcie;
+
On Wednesday 24 September 2014 23:34:04 Sunil Kovvuri wrote:
On Wed, Sep 24, 2014 at 9:36 PM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ compatible = cavium,thunder-pcie;
+ device_type = pci;
+
On Thu, Sep 25, 2014 at 12:04 AM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 23:34:04 Sunil Kovvuri wrote:
On Wed, Sep 24, 2014 at 9:36 PM, Arnd Bergmann a...@arndb.de wrote:
On Wednesday 24 September 2014 17:37:45 Robert Richter wrote:
+ compatible =
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