On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
I will try to answer this. This IP is indeed a GPIO block
but the IO's are used just OUTPUT lines from Linux
HOST perspective. These IOs are connected to the DSPs
as input/IRQ lines.
So the DSP is another
On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
I will try to answer this. This IP is indeed a GPIO block
but the IO's are used just OUTPUT lines from Linux
HOST perspective. These IOs are connected
On Thu, Jul 24, 2014 at 4:21 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
I will try to answer this. This IP is indeed a GPIO block
but the IO's
On Thursday 24 July 2014 11:23 AM, Linus Walleij wrote:
On Thu, Jul 24, 2014 at 4:21 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
santosh.shilim...@ti.com wrote:
I will try to
On 23 July 2014 20:40, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP.
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
On 23 July 2014 20:40, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send
On 24 July 2014 22:52, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
On 23 July 2014 20:40, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Murali
Hi,
On 07/24/2014 01:12 PM, Jassi Brar wrote:
On 24 July 2014 22:52, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
On 23 July 2014 20:40, Linus Walleij linus.wall...@linaro.org wrote:
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
On Thursday 24 July 2014 02:52 PM, Suman Anna wrote:
Hi,
On 07/24/2014 01:12 PM, Jassi Brar wrote:
On 24 July 2014 22:52, Santosh Shilimkar santosh.shilim...@ti.com wrote:
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
On 23 July 2014 20:40, Linus Walleij linus.wall...@linaro.org
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
each DSP core.
On Wednesday 23 July 2014 11:10 AM, Linus Walleij wrote:
On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
grygorii.stras...@ti.com wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP
Hi Varka Bhadram,
On 07/16/2014 01:05 PM, Varka Bhadram wrote:
On 07/16/2014 04:13 PM, Grygorii Strashko wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ
On 07/16/2014 04:13 PM, Grygorii Strashko wrote:
From: Murali Karicheri m-kariche...@ti.com
On Keystone SOCs, ARM host can send interrupts to DSP cores using the
DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ signals for
each DSP core. This is one of the component used by the
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