Hi Vinod,
On Mon, Oct 12, 2015 at 7:53 PM, Vinod Koul wrote:
> On Fri, Oct 09, 2015 at 10:08:32PM +0530, Rameshwar Sahu wrote:
>> Hi Vinod,
>>
>> On Fri, Oct 9, 2015 at 9:42 PM, Vinod Koul wrote:
>> > On Thu, Oct 08, 2015 at 02:36:57PM +0530, Rameshwar Prasad Sahu wrote:
>> >> The DMA engine sup
On Fri, Oct 09, 2015 at 10:08:32PM +0530, Rameshwar Sahu wrote:
> Hi Vinod,
>
> On Fri, Oct 9, 2015 at 9:42 PM, Vinod Koul wrote:
> > On Thu, Oct 08, 2015 at 02:36:57PM +0530, Rameshwar Prasad Sahu wrote:
> >> The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
> >> computations.
Hi Vinod,
On Fri, Oct 9, 2015 at 9:42 PM, Vinod Koul wrote:
> On Thu, Oct 08, 2015 at 02:36:57PM +0530, Rameshwar Prasad Sahu wrote:
>> The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
>> computations. But the bandwidth of the entire DMA engine is shared
>> among all channels.
On Thu, Oct 08, 2015 at 02:36:57PM +0530, Rameshwar Prasad Sahu wrote:
> The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
> computations. But the bandwidth of the entire DMA engine is shared
> among all channels. This patch re-configures operations availability
> such that one ca
The DMA engine supports memory copy, RAID5 XOR, RAID6 PQ, and other
computations. But the bandwidth of the entire DMA engine is shared
among all channels. This patch re-configures operations availability
such that one can achieve maximum performance for XOR and PQ
computation by removing the memory
