On Tue, Nov 24, 2015 at 10:04 AM, Carlo Caione wrote:
> On Tue, Nov 24, 2015 at 9:28 AM, Marc Zyngier wrote:
>> [...]
>>
>>> + for (i = 0; i < pc->num_gic_irqs; i++) {
>>> + struct of_phandle_args oirq;
>>> +
>>> +
On Tue, 24 Nov 2015 10:04:50 +0100
Carlo Caione wrote:
> On Tue, Nov 24, 2015 at 9:28 AM, Marc Zyngier wrote:
> > On Mon, 23 Nov 2015 11:16:54 +0100
> > Carlo Caione wrote:
> >
> >> From: Carlo Caione
> >>
> >> On
On Thu, Nov 26, 2015 at 5:27 PM, Marc Zyngier wrote:
> On Tue, 24 Nov 2015 10:04:50 +0100
> Carlo Caione wrote:
>
>> On Tue, Nov 24, 2015 at 9:28 AM, Marc Zyngier wrote:
>> > On Mon, 23 Nov 2015 11:16:54 +0100
>> > Carlo Caione
On Mon, 23 Nov 2015 11:16:54 +0100
Carlo Caione wrote:
> From: Carlo Caione
>
> On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO
> interrupt modules that can be programmed to use any of the GPIOs in the
> chip as an interrupt source.
>
>
On Tue, Nov 24, 2015 at 9:28 AM, Marc Zyngier wrote:
> On Mon, 23 Nov 2015 11:16:54 +0100
> Carlo Caione wrote:
>
>> From: Carlo Caione
>>
>> On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO
>> interrupt modules that
From: Carlo Caione
On Meson8 and Meson8b SoCs there are 8 independent filtered GPIO
interrupt modules that can be programmed to use any of the GPIOs in the
chip as an interrupt source.
For each GPIO IRQ we have:
GPIOs --> [mux]--> [polarity]--> [filter]--> [edge select]-->