[PATCH v2 3/7] clk: Amlogic: Add reset controller for CPU cores for Meson8b

From: Carlo Caione In the Amlogic Meson8b SoC we need to soft reset the CPU cores during the boot to enable the SMP support. With this patch we extend the clock controller adding a small reset controller in charge of resetting the cores. Signed-off-by: Carlo Caione

Re: [PATCH v2 3/7] clk: Amlogic: Add reset controller for CPU cores for Meson8b

On Wednesday 02 December 2015 18:22:29 Carlo Caione wrote: > > +#define RST_CORE0 0 > +#define RST_CORE1 1 > +#define RST_CORE2 2 > +#define RST_CORE3 3 These defines are rather silly and just cause interdependencies with the header file. Just