On Mon, 2015-06-01 at 12:13 +0200, Mike Looijmans wrote:
--- /dev/null
+++ b/drivers/clk/clk-cdce925.c
+static int cdce925_regmap_i2c_write(
+ void *context, const void *data, size_t count)
+ dev_dbg(i2c-dev, %s(%u) %#x %#x\n, __func__, count,
+ reg_data[0],
On Tue, 2015-06-02 at 10:43 +0200, Mike Looijmans wrote:
Out of curiousity, I did try a compile on the x86 host, but couldn't select
the driver because it depends on CONFIG_OF, so I just compiled if for the ARM
target to verify that it still compiles in kernel 4.1. How did you manage to
On 02-06-15 09:50, Paul Bolle wrote:
On Mon, 2015-06-01 at 12:13 +0200, Mike Looijmans wrote:
--- /dev/null
+++ b/drivers/clk/clk-cdce925.c
+static int cdce925_regmap_i2c_write(
+ void *context, const void *data, size_t count)
+ dev_dbg(i2c-dev, %s(%u) %#x %#x\n, __func__,
On 02-06-15 09:50, Paul Bolle wrote:
On Mon, 2015-06-01 at 12:13 +0200, Mike Looijmans wrote:
--- /dev/null
+++ b/drivers/clk/clk-cdce925.c
+static int cdce925_regmap_i2c_write(
+ void *context, const void *data, size_t count)
+ dev_dbg(i2c-dev, %s(%u) %#x %#x\n, __func__,
This driver supports the TI CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following setup,
and uses a fixed setting for the output muxes:
Y1 is derived from the input clock
Y2 and
