Hello.
On 7/13/2015 12:04 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals. Additional
These GPIOs don't have anything to do
Hi Sergei,
On 10 July 2015 17:36, Sergei wrote:
Hello.
On 07/07/2015 02:55 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals.
Hi Sergei,
On 13 July 2015 11:17, Sergei wrote:
Hello.
On 7/13/2015 12:04 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals.
On 07/13/2015 07:55 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals. Additional
These GPIOs don't have anything to do with
Hi Sergei,
On 13 July 2015 17:37, Sergei wrote:
On 07/13/2015 06:02 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals.
Hi Sergei,
On 13 July 2015 18:10, Sergei wrote:
On 07/13/2015 07:55 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals.
On 07/13/2015 06:02 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals. Additional
These GPIOs don't have anything to do with
Hello.
On 07/07/2015 02:55 PM, Phil Edworthy wrote:
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals. Additional
These GPIOs don't have anything to do
Instead of statically selecting the PHY connection to either the
USBHS (Function) or PCI0 (Host) IP blocks, this change allows the
dts to specifiy gpio pins for the vbus and id signals. Additional
gpio pins are used to control power to an external OTG device and
an override to turn vbus on/off.
