On 8/4/2015 1:05 AM, Andy Gross wrote:
On Mon, Aug 03, 2015 at 10:38:18AM +0530, Archit Taneja wrote:
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts
On 8/4/2015 2:28 AM, Stephen Boyd wrote:
On 08/03, Archit Taneja wrote:
@@ -93,5 +115,19 @@
sata@2900 {
status = "ok";
};
+
+ nand@1ac0 {
+ status = "ok";
+
+ pinctrl-0 = <
On 08/03, Archit Taneja wrote:
> @@ -93,5 +115,19 @@
> sata@2900 {
> status = "ok";
> };
> +
> + nand@1ac0 {
> + status = "ok";
> +
> + pinctrl-0 = <&nand_pins>;
> + pin
On Mon, Aug 03, 2015 at 10:38:18AM +0530, Archit Taneja wrote:
> Enable the NAND controller node on the AP148 platform. Provide pinmux
> information.
>
> Cc: devicetree@vger.kernel.org
>
> Signed-off-by: Archit Taneja
> ---
> arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36
>
Enable the NAND controller node on the AP148 platform. Provide pinmux
information.
Cc: devicetree@vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qco