Hi Geert,
On Tuesday 27 October 2015 09:14:15 Geert Uytterhoeven wrote:
> On Tue, Oct 27, 2015 at 2:34 AM, Laurent Pinchart wrote:
> > On Monday 26 October 2015 20:02:45 Geert Uytterhoeven wrote:
> >> On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart wrote:
> >>> On Friday 16 October 2015
Hi Laurent,
CC linux-pm
On Tue, Oct 27, 2015 at 2:34 AM, Laurent Pinchart
wrote:
> On Monday 26 October 2015 20:02:45 Geert Uytterhoeven wrote:
>> On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart wrote:
>> > On Friday 16 October 2015 14:49:16 Geert
Hi Laurent,
On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart
wrote:
> On Friday 16 October 2015 14:49:16 Geert Uytterhoeven wrote:
>> On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
>> Generator) and MSSR (Module Standby and Software Reset)
Hi Geert,
On Monday 26 October 2015 20:02:45 Geert Uytterhoeven wrote:
> On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart wrote:
> > On Friday 16 October 2015 14:49:16 Geert Uytterhoeven wrote:
> >> On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
> >> Generator) and MSSR
Hello,
On Wednesday 21 October 2015 01:01:03 Magnus Damm wrote:
> On Tue, Oct 20, 2015 at 9:16 PM, Geert Uytterhoeven wrote:
> > On Fri, Oct 16, 2015 at 2:49 PM, Geert Uytterhoeven wrote:
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> >> @@ -0,0 +1,71
Hi Geert,
Thank you for the patch.
On Friday 16 October 2015 14:49:16 Geert Uytterhoeven wrote:
> On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
> Generator) and MSSR (Module Standby and Software Reset) blocks are
> intimately connected, and share the same register block.
>
Hi Laurent,
On Fri, Oct 23, 2015 at 1:05 PM, Laurent Pinchart
wrote:
> On Wednesday 21 October 2015 01:01:03 Magnus Damm wrote:
>> On Tue, Oct 20, 2015 at 9:16 PM, Geert Uytterhoeven wrote:
>> > On Fri, Oct 16, 2015 at 2:49 PM, Geert Uytterhoeven wrote:
>> >>
Hi Geert,
On Friday 23 October 2015 13:09:22 Geert Uytterhoeven wrote:
> On Fri, Oct 23, 2015 at 1:05 PM, Laurent Pinchart wrote:
> > On Wednesday 21 October 2015 01:01:03 Magnus Damm wrote:
> >> On Tue, Oct 20, 2015 at 9:16 PM, Geert Uytterhoeven wrote:
> >>> On Fri, Oct 16, 2015 at 2:49 PM,
Hi Geert,
Quoting Geert Uytterhoeven (2015-10-16 05:49:16)
> On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
> Generator) and MSSR (Module Standby and Software Reset) blocks are
> intimately connected, and share the same register block.
>
> Hence it makes sense to describe
On Fri, Oct 16, 2015 at 2:49 PM, Geert Uytterhoeven
wrote:
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
> @@ -0,0 +1,71 @@
> +* Renesas Clock Pulse Generator / Module Standby and Software Reset
> +
> +On Renesas ARM SoCs
Hi Geert,
On Tue, Oct 20, 2015 at 9:16 PM, Geert Uytterhoeven
wrote:
> On Fri, Oct 16, 2015 at 2:49 PM, Geert Uytterhoeven
> wrote:
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
>> @@ -0,0 +1,71 @@
>> +*
On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
Generator) and MSSR (Module Standby and Software Reset) blocks are
intimately connected, and share the same register block.
Hence it makes sense to describe these two blocks using a
single device node in DT, instead of using a
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