Re: [PATCH v5 6/8] v4l: xilinx: Add Xilinx Video IP core

On 03/03/15 23:15, Laurent Pinchart wrote: Hi Hans, Thank you for the review. On Tuesday 03 March 2015 12:28:24 Hans Verkuil wrote: Hi Laurent, Thanks for this patch. I do have a few comments, see below. Note that I am OK with the new DT format description. On 03/02/2015 02:48 AM,

Re: [PATCH v5 6/8] v4l: xilinx: Add Xilinx Video IP core

Hi Hans, On Wednesday 04 March 2015 10:30:40 Hans Verkuil wrote: On 03/03/15 23:15, Laurent Pinchart wrote: On Tuesday 03 March 2015 12:28:24 Hans Verkuil wrote: On 03/02/2015 02:48 AM, Laurent Pinchart wrote: Xilinx platforms have no hardwired video capture or video processing

Re: [PATCH v5 6/8] v4l: xilinx: Add Xilinx Video IP core

Hi Hans, Thank you for the review. On Tuesday 03 March 2015 12:28:24 Hans Verkuil wrote: Hi Laurent, Thanks for this patch. I do have a few comments, see below. Note that I am OK with the new DT format description. On 03/02/2015 02:48 AM, Laurent Pinchart wrote: Xilinx platforms have

Re: [PATCH v5 6/8] v4l: xilinx: Add Xilinx Video IP core

Hi Laurent, Thanks for this patch. I do have a few comments, see below. Note that I am OK with the new DT format description. On 03/02/2015 02:48 AM, Laurent Pinchart wrote: Xilinx platforms have no hardwired video capture or video processing interface. Users create capture and memory to

[PATCH v5 6/8] v4l: xilinx: Add Xilinx Video IP core

Xilinx platforms have no hardwired video capture or video processing interface. Users create capture and memory to memory processing pipelines in the FPGA fabric to suit their particular needs, by instantiating video IP cores from a large library. The Xilinx Video IP core is a framework that