On Tue, Oct 29, 2013 at 02:55:56PM +0100, Linus Walleij wrote:
> On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
>
> > Core driver for register formats of imx1/imx21/imx27 processors.
> >
> > The pins of those processors are grouped into ports. Each port has 32
> > pins. The pins mux con
On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
> +static int imx1_pinconf_get(struct pinctrl_dev *pctldev,
> +unsigned pin_id, unsigned long *config)
> +{
> + struct imx1_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> +
> + *config = imx1_re
On Mon, Oct 28, 2013 at 10:00 AM, Markus Pargmann wrote:
> Core driver for register formats of imx1/imx21/imx27 processors.
>
> The pins of those processors are grouped into ports. Each port has 32
> pins. The pins mux configuration is controlled by registers with 1 or 2
> bit per pin, depending
Core driver for register formats of imx1/imx21/imx27 processors.
The pins of those processors are grouped into ports. Each port has 32
pins. The pins mux configuration is controlled by registers with 1 or 2
bit per pin, depending on the specific control register.
Signed-off-by: Markus Pargmann
A
