The suspend/resume code for Armada XP has to modify certain registers of the SDRAM controller. Therefore, we need to define a Device Tree binding for this hardware block.
Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com> Cc: devicetree@vger.kernel.org Cc: Kumar Gala <ga...@codeaurora.org> Cc: Ian Campbell <ijc+devicet...@hellion.org.uk> Cc: Mark Rutland <mark.rutl...@arm.com> Cc: Rob Herring <robh...@kernel.org> Reviewed-by: Gregory CLEMENT <gregory.clem...@free-electrons.com> --- .../memory-controllers/mvebu-sdram-controller.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt new file mode 100644 index 0000000..89657d1 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt @@ -0,0 +1,21 @@ +Device Tree bindings for MVEBU SDRAM controllers + +The Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller +differs from one SoC variant to another, but they also share a number +of commonalities. + +For now, this Device Tree binding documentation only documents the +Armada XP SDRAM controller. + +Required properties: + + - compatible: for Armada XP, "marvell,armada-xp-sdram-controller" + - reg: a resource specifier for the register space, which should + include all SDRAM controller registers as per the datasheet. + +Example: + +sdramc@1400 { + compatible = "marvell,armada-xp-sdram-controller"; + reg = <0x1400 0x500>; +}; -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html