Re: [PATCHv6 2/3] devicetree: Addition of the Altera SDRAM EDAC

2014-06-22 Thread Thor Thayer
On Sat, Jun 21, 2014 at 4:06 AM, Steffen Trumtrar wrote: > On Fri, Jun 20, 2014 at 06:22:02PM -0500, ttha...@altera.com wrote: >> From: Thor Thayer >> >> Addition of the Altera SDRAM EDAC bindings and device tree changes >> >> v2: Changes to SoC EDAC source code. >> >> v3: Fix typo in device tree

Re: [PATCHv6 2/3] devicetree: Addition of the Altera SDRAM EDAC

2014-06-21 Thread Steffen Trumtrar
On Fri, Jun 20, 2014 at 06:22:02PM -0500, ttha...@altera.com wrote: > From: Thor Thayer > > Addition of the Altera SDRAM EDAC bindings and device tree changes > > v2: Changes to SoC EDAC source code. > > v3: Fix typo in device tree documentation. > > v4,v5: No changes - bump version for consis

[PATCHv6 2/3] devicetree: Addition of the Altera SDRAM EDAC

2014-06-20 Thread tthayer
From: Thor Thayer Addition of the Altera SDRAM EDAC bindings and device tree changes v2: Changes to SoC EDAC source code. v3: Fix typo in device tree documentation. v4,v5: No changes - bump version for consistency. v6: Assign ECC registers in SDRAM controller to EDAC Signed-off-by: Thor Thay

[PATCHv6 2/3] devicetree: Addition of the Altera SDRAM EDAC

2014-06-20 Thread tthayer
From: Thor Thayer v2: Changes to SoC EDAC source code. v3: Fix typo in device tree documentation. v4,v5: No changes - bump version for consistency. v6: Assign ECC registers in SDRAM controller to EDAC Signed-off-by: Thor Thayer --- .../bindings/arm/altera/socfpga-sdram-edac.txt | 15 +