On Wed, Feb 26, 2014 at 06:51:55PM +0200, Stanimir Varbanov wrote:
> > + /* read revision and configuration information */
> > + val = readl_relaxed(bdev->regs + BAM_REVISION) & NUM_EES_MASK;
> > +
>
> The ees shit is not zero and you got wrong ee. Could you add the line
> below or something s
Hi Andy,
Thanks for the patch.
On 02/25/2014 01:11 AM, Andy Gross wrote:
> Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
> found in the MSM 8x74 platforms.
>
> Each BAM DMA device is associated with a specific on-chip peripheral. Each
> channel provides a uni-di
On Tue, Feb 25, 2014 at 12:05:00PM +0900, Mark Brown wrote:
> On Mon, Feb 24, 2014 at 06:09:13PM -0600, Felipe Balbi wrote:
>
> > > + depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
>
> > do you really want to make it depend on ARM even when COMPILE_TEST=y ?
>
> writel_relaxed() is unfortuna
On Mon, Feb 24, 2014 at 06:09:13PM -0600, Felipe Balbi wrote:
> > + depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM)
> do you really want to make it depend on ARM even when COMPILE_TEST=y ?
writel_relaxed() is unfortunately not generally available so it'd fail
to build on platforms like x86
Hi,
On Mon, Feb 24, 2014 at 05:11:40PM -0600, Andy Gross wrote:
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index 605b016..f87cef9 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -401,4 +401,13 @@ config DMATEST
> config DMA_ENGINE_RAID
> bool
>
> +confi
Add the DMA engine driver for the QCOM Bus Access Manager (BAM) DMA controller
found in the MSM 8x74 platforms.
Each BAM DMA device is associated with a specific on-chip peripheral. Each
channel provides a uni-directional data transfer engine that is capable of
transferring data between the perip
