On 10/16/2013 06:04 PM, Mark Rutland wrote:
On Thu, Oct 10, 2013 at 06:29:59PM +0100, Peter Ujfalusi wrote:
On 10/10/2013 07:59 PM, Mark Rutland wrote:
No, they're not actually of much practical use to us at the minute but
it was generally felt better to include the information and not use it
s
On Thu, Oct 10, 2013 at 06:29:59PM +0100, Peter Ujfalusi wrote:
> On 10/10/2013 07:59 PM, Mark Rutland wrote:
> >> No, they're not actually of much practical use to us at the minute but
> >> it was generally felt better to include the information and not use it
> >> so that if someone does come up
On 10/10/2013 07:59 PM, Mark Rutland wrote:
>> No, they're not actually of much practical use to us at the minute but
>> it was generally felt better to include the information and not use it
>> so that if someone does come up with a use for them then the trees for
>> deployed systems already have
On Tue, Oct 08, 2013 at 01:46:41AM +0100, Mark Brown wrote:
> On Mon, Oct 07, 2013 at 10:47:18PM +0100, Mark Rutland wrote:
> > On Thu, Sep 26, 2013 at 08:18:28PM +0100, Jyri Sarha wrote:
>
> > > - interrupts : Interrupt number for McASP
>
> > The device also seems to be able to generate multipl
Hi,
On 10/08/2013 12:13 PM, Jyri Sarha wrote:
>> I have some questions however. I took a look at the McASP (TMS320C6000)
>> reference guide, and the registers appeared to all be in one contiguous
>> bank, and "mpu" and "dma" don't appear to be names of particular
>> registers or names of banks of
On 10/08/2013 12:47 AM, Mark Rutland wrote:
Hello,
Hi!
I am not the author of this driver so my knowledge may have gaps, when
it comes to details I have not touched yet. Anyway, I do my best to
address your comments.
...
-- reg : Should contain McASP registers offset and length
+- reg : Sho
On Mon, Oct 07, 2013 at 10:47:18PM +0100, Mark Rutland wrote:
> On Thu, Sep 26, 2013 at 08:18:28PM +0100, Jyri Sarha wrote:
> > - interrupts : Interrupt number for McASP
> The device also seems to be able to generate multiple interrupts -- which
> interrupt does this actually cover?
> The drive
Hello,
On Thu, Sep 26, 2013 at 08:18:28PM +0100, Jyri Sarha wrote:
> This patch adds DMA register location to mcasp DT bindings. On am33xx
> SoCs the McASP registers are mapped trough L4 interconnect, which is
> not accessible by the DMA controller, so McASP data port is mapped
> trough L3 to a di
