On Tue, Sep 15, 2015 at 4:47 PM, wrote:
> From: Dinh Nguyen
>
> Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
>
> Signed-off-by: Dinh Nguyen
> ---
> v3: change #address-cells and
> +/ {
> + compatible = "altr,socfpga-stratix10";
> + #address-cells = <2>;
> + #size-cells = <2>;
[...]
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> + device_type = "soc";
> +
On Wed, Sep 23, 2015 at 11:43:25PM +0100, Dinh Nguyen wrote:
> On Wed, Sep 23, 2015 at 12:54 AM, Mark Rutland wrote:
> >> +/ {
> >> + compatible = "altr,socfpga-stratix10";
> >> + #address-cells = <2>;
> >> + #size-cells = <2>;
> >
> > [...]
> >
> >> + soc {
On Wed, Sep 23, 2015 at 12:54 AM, Mark Rutland wrote:
>> +/ {
>> + compatible = "altr,socfpga-stratix10";
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>
> [...]
>
>> + soc {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
From: Dinh Nguyen
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen
---
v3: change #address-cells and #size-cells to <2>
change the GIC address to 0xfffc1000
update the GIC virtual CPU