.@lists.ozlabs.org
> Subject: Re: 答复: [v7] clk: corenet: Adds the clock binding
>
> On Wed, 2014-01-08 at 20:57 -0600, Tang Yuantian-B29983 wrote:
> > Thanks for you review.
> > See my response inline.
> >
> > Thanks,
> > Yuantian
> >
> > > -O
k Rutland
> > Cc: Tang Yuantian-B29983; ga...@kernel.crashing.org;
> > devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org
> > Subject: Re: 答复: [v7] clk: corenet: Adds the clock binding
> >
> > On Wed, 2014-01-08 at 09:30 +, Mark Rutland wr
g
> Subject: Re: 答复: [v7] clk: corenet: Adds the clock binding
>
> On Wed, 2014-01-08 at 09:30 +, Mark Rutland wrote:
> > On Wed, Jan 08, 2014 at 08:53:56AM +, Yuantian Tang wrote:
> > >
> > >
> > > 发件人:
送: ga...@kernel.crashing.org; mark.rutl...@arm.com;
> > devicetree@vger.kernel.org; linuxppc-...@lists.ozlabs.org
> > 主题: Re: [v7] clk: corenet: Adds the clock binding
> >
> > On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
> > > +Recommended prope
.kernel.org; linuxppc-...@lists.ozlabs.org
> 主题: Re: [v7] clk: corenet: Adds the clock binding
>
> On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
> > +Recommended properties:
> > +- ranges: Allows valid translation between child's address space and
> > +
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
> +Recommended properties:
> +- ranges: Allows valid translation between child's address space and
> + parent's. Must be present if the device has sub-nodes.
> +- #address-cells: Specifies the number of cells used to represent
> +
a; Tang
> Yuantian-B29983; Tang Yuantian-B29983; Li Yang-Leo-R58472
> Subject: [PATCH v7] clk: corenet: Adds the clock binding
>
> From: Tang Yuantian
>
> Adds the clock bindings for Freescale PowerPC CoreNet platforms
>
> Signed-off-by: Tang Yuantian
> Signed-off-by
rg;
> mark.rutl...@arm.com; Wood Scott-B07421; grant.lik...@secretlab.ca; Tang
> Yuantian-B29983; Tang Yuantian-B29983; Li Yang-Leo-R58472
> Subject: [PATCH v7] clk: corenet: Adds the clock binding
>
> From: Tang Yuantian
>
> Adds the clock bindings for Freescale PowerPC CoreNe
From: Tang Yuantian
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed-off-by: Tang Yuantian
Signed-off-by: Li Yang
---
v7:
- refined some properties' definitions
v6:
- splited the previous patch into 2 parts, one is for binding(this one),
the othe
