On 2/6/2012 7:33 PM, Stephen Warren wrote:
On 02/06/2012 11:05 AM, Mitch Bradley wrote:
I like the general approach of simplifying the pinctrl thing, as the
previous approach did not appear to be converging.
One possible name would be "gpconfig" - for general purpose configuration.
Sounds rea
* Lars-Peter Clausen wrote:
> On 02/06/2012 04:19 PM, Thierry Reding wrote:
> > This commit modifies the PWM core to support multiple PWMs per struct
> > pwm_chip.
>
> I think you should mention what motivates this change.
Okay, I can add that.
> > It achieves this in a similar way to how gpioli
On 02/06/2012 11:05 AM, Mitch Bradley wrote:
> I like the general approach of simplifying the pinctrl thing, as the
> previous approach did not appear to be converging.
>
> One possible name would be "gpconfig" - for general purpose configuration.
Sounds reasonable
> The register access model i
On 02/06/2012 11:03 AM, Tony Lindgren wrote:
> * Linus Walleij [120206 08:58]:
>> On Mon, Feb 6, 2012 at 6:53 AM, Stephen Warren wrote:
>>
>> I will certainly finalize the pinctrl subsystem as-is, adding the
>> pin configurations states as the last major piece. If for nothing
>> else it provides
On Tue, Feb 7, 2012 at 12:57 AM, Tony Lindgren wrote:
>> I'm not sure if I'm following completely, if this is inside the
>> devicetree-based
>> driver file, would it work to just add a struct dentry * to the
>> pinctrl_desc where you put a per-driver file?
>
> I was thinking generic debufs entri
* Linus Walleij [120206 14:44]:
> On Mon, Feb 6, 2012 at 10:04 PM, Tony Lindgren wrote:
>
> >> I actually had something like unnamed pins in the early patches
> >> to register a bunch of anonymous pins ranges, so why not bring
> >> it back in.
> >
> > Yeah it seems that the mux registers should
On Mon, Feb 6, 2012 at 10:04 PM, Tony Lindgren wrote:
>> I actually had something like unnamed pins in the early patches
>> to register a bunch of anonymous pins ranges, so why not bring
>> it back in.
>
> Yeah it seems that the mux registers should be listed, it might
> require a little bit of t
On 2/6/2012 9:26 AM, Linus Walleij wrote:
On Mon, Feb 6, 2012 at 8:05 PM, Mitch Bradley wrote:
I like the general approach of simplifying the pinctrl thing, as the
previous approach did not appear to be converging.
pinctrl as such is upstream, widely ACKed and quite converged I'd say.
But t
* Linus Walleij [120206 11:25]:
> On Mon, Feb 6, 2012 at 8:03 PM, Tony Lindgren wrote:
>
> > So far the only
> > change needed for pinctrl drivers containing no data is that
> > we should make the string names optional and structure debugfs
> > around the physical register addresses instead. I'm
On Mon, Feb 6, 2012 at 8:03 PM, Tony Lindgren wrote:
> So far the only
> change needed for pinctrl drivers containing no data is that
> we should make the string names optional and structure debugfs
> around the physical register addresses instead. I'm basically
> just setting the mux register ph
On Sun, Feb 05, 2012 at 09:53:38PM -0800, Stephen Warren wrote:
> On 02/05/2012 08:20 PM, Linus Walleij wrote:
> > A controlled set of register read/writes and maybe also conditionals
> > (if that bit is 1, do this, else do that, plus a loop command to wait
> > for a flag or similar) are known as
On Mon, Feb 6, 2012 at 8:05 PM, Mitch Bradley wrote:
> I like the general approach of simplifying the pinctrl thing, as the
> previous approach did not appear to be converging.
pinctrl as such is upstream, widely ACKed and quite converged I'd say.
But the Device Tree bindings and general path t
On Mon, 06 Feb 2012 19:38:29 +0100, Karol Lewandowski wrote:
> On 05.02.2012 11:38, Jean-Christophe PLAGNIOL-VILLARD wrote:
>
> Hi!
>
> > +Device-Tree bindings for i2c gpio driver
> > +
> > +Required properties:
> > + - compatible = "gpio-i2c";
>
> Driver name is "i2c-gpio" in file i2c-gpio.c.
I like the general approach of simplifying the pinctrl thing, as the
previous approach did not appear to be converging.
One possible name would be "gpconfig" - for general purpose configuration.
The register access model in the strawman proposal is probably too
simple. 32-bit memory mapped re
* Linus Walleij [120206 08:58]:
> On Mon, Feb 6, 2012 at 6:53 AM, Stephen Warren wrote:
>
> I will certainly finalize the pinctrl subsystem as-is, adding the
> pin configurations states as the last major piece. If for nothing
> else it provides some understanding of the problem space.
>
> I thi
* Stephen Warren [120204 21:01]:
> Sorry, I haven't had a chance to read any of the pincrl emails from
> Friday onwards. However, I thought a bit more about this, and decided
> to propose someting much simpler:
>
> Thoughts:
>
> * Defining all the pins, groups, functions, ... takes a lot of spac
This driver supports the Altera PIO core.
Signed-off-by: Thomas Chou
Signed-off-by: Tobias Klauser
---
This driver was submitted already about a year ago by Thomas, was
adjusted by him according to some remarks made by Grant and was then
included in the -mm tree [1] for some time but dropped aga
The gpios property is described in Documentation/devicetree/gpio.txt, so
reference this document.
Signed-off-by: Tobias Klauser
---
Documentation/devicetree/bindings/gpio/led.txt |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/
On Mon, Feb 6, 2012 at 6:53 AM, Stephen Warren wrote:
> I think the main argument to call it pinctrl/pinmux still is to provide
> some named API and reason for drivers to invoke when they wanted to make
> use of the feature.
>
> In other words, it's pretty easy to see why and when a driver would
On Fri, Jan 06, 2012 at 08:47:11AM -0800, Stephen Warren wrote:
> Ben Dooks wrote at Friday, January 06, 2012 9:26 AM:
> > On Tue, Dec 20, 2011 at 01:47:29PM -0800, Stephen Warren wrote:
> > > Shubhrajyoti Datta wrote at Monday, December 19, 2011 11:15 PM:
> > > ...
> > > > Hi Stephen ,
> > > > cou
Hi Jean-Christophe,
On Monday 06 February 2012 11:35:11 Jean-Christophe PLAGNIOL-VILLARD wrote:
> - nand-ecc-mode : String, operation mode of the NAND ecc mode.
> Supported values are: "none", "soft", "hw", "hw_syndrome",
> "hw_oob_first", "soft_bch".
> - nand-bus-width : 8 or 16 bus width if no
On Sun, Feb 05, 2012 at 11:38:53AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> + - udelay: half clock cycle time in us (may depend on each platform)
> + udelay = <2>; /* ~100 kHz */
Why not specify this in kHz and do the conversion in the driver? It
seems a more intuitiv
This patch series adds very rudimentary device-tree support for PWM devices.
I fully realize that this is early work and it should not be merged as is.
However I wanted to post these patches for review to make sure I'm not on a
wild-goose chase.
With all of these patches applied (plus one board-sp
This commit adds very basic support for device tree probing. Currently,
only a PWM and maximum and default brightness values can be specified.
Enabling or disabling backlight power via GPIOs is not yet supported.
A pointer to the exit() callback is stored in the driver data to keep it
around until
A subsequent patch will add a generic PWM API driver for the Tegra2 PWFM
controller, supporting all four PWM devices with a single PWM chip. The
device will be named tegra-pwm and only one clock needs to be provided.
Signed-off-by: Thierry Reding
Acked-by: Stephen Warren
---
arch/arm/mach-tegra
Signed-off-by: Thierry Reding
---
arch/arm/plat-pxa/Makefile |1 -
arch/arm/plat-pxa/pwm.c| 304
drivers/pwm/Kconfig|9 ++
drivers/pwm/Makefile |1 +
drivers/pwm/pwm-pxa.c | 243 +++
This commit adds a generic PWM framework driver for the PWFM controller
found on NVIDIA Tegra SoCs. The driver is based on code from the
Chromium kernel tree and was originally written by Gary King (NVIDIA)
and later modified by Simon Que (Chromium).
Signed-off-by: Thierry Reding
---
Changes in v
Signed-off-by: Thierry Reding
---
arch/blackfin/Kconfig | 10 ---
arch/blackfin/kernel/Makefile |1 -
arch/blackfin/kernel/pwm.c| 100 -
drivers/pwm/Kconfig |9 ++
drivers/pwm/Makefile |1 +
drivers/pwm/pwm-bfin.c| 164
This commit modifies the PWM core to support multiple PWMs per struct
pwm_chip. It achieves this in a similar way to how gpiolib works, by
allowing PWM ranges to be requested dynamically (pwm_chip.base == -1) or
starting at a given offset (pwm_chip.base >= 0). A chip specifies how
many PWMs it cont
From: Sascha Hauer
This patch adds framework support for PWM (pulse width modulation) devices.
The is a barebone PWM API already in the kernel under include/linux/pwm.h,
but it does not allow for multiple drivers as each of them implements the
pwm_*() functions.
There are other PWM framework pa
Add auxdata to instantiate a device tree for the PWFM controller and
include a corresponding node in the device tree.
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts/tegra20.dtsi |6 ++
arch/arm/boot/dts/tegra30.dtsi |6 ++
arch/arm/mach-tegra/board-dt-tegra20
From: Simon Que
PWM clock source registers in Tegra 2 have different clock source selection bit
fields than other registers. PWM clock source bits in CLK_SOURCE_PWM_0 register
are located at bit field bit[30:28] while others are at bit field bit[31:30] in
their respective clock source register.
This patch adds helpers to support device tree bindings for the generic
PWM API. Device tree binding documentation for PWM controllers is also
provided.
Signed-off-by: Thierry Reding
---
Changes in v2:
- add device tree binding documentation
- add of_xlate to parse controller-specific PWM-spe
use a local copy of board informatin and fill with DT data
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Grant Likely
Cc: Nicolas Ferre
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-...@lists.infradead.org
---
V2:
comment from Grant
rebase over rc3
Best Regards,
- nand-ecc-mode : String, operation mode of the NAND ecc mode.
Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
"soft_bch".
- nand-bus-width : 8 or 16 bus width if not present 8
- nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
Signed-off
Hi Olof,
Am Sonntag, 5. Februar 2012, 14:00:25 schrieb Olof Johansson:
> Hi,
>
> On Sun, Feb 5, 2012 at 9:18 AM, Marc Dietrich wrote:
> > Add device tree bindings information for rfkill gpio switches.
> >
> > Cc: linux-wirel...@vger.kernel.org
> > Cc: "John W. Linville"
> > Cc: Johannes Berg
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