Re: [PATCH v8 1/1] of/lib: Allow scripts/dtc/libfdt to be used from kernel code

On 06/06/2012 05:49 PM, David Daney wrote: > From: David Daney > > libfdt is part of the device tree support in scripts/dtc/libfdt. For > some platforms that use the Device Tree, we want to be able to edit > the flattened device tree form. > > We don't want to burden kernel builds that do not r

Re: [PATCH v4] usb: ehci-hcd: notify phy when connect change

On Thu, Jun 07, 2012 at 10:04:00AM +0800, Chen Peter-B29397 wrote: > > > > > > It still has below limitations: > > > - it does not work for multi-phy ehci > > > - the best place is after debounce, but I can't get > > > phy there > > > > > + /* FIXME: > > > + *

[PATCH v3 5/5] MIPS: Octeon: Use device tree to register serial ports.

From: David Daney Switch to using the device tree to register serial ports. Add all the ports with compatible = "cavium,octeon-3860-uart". Octeon serial ports have their own device type, required port flags, and I/O functions, so using of_serial.c is not indicated. We need to do this as late_i

[PATCH v3 3/5] netdev: octeon_mgmt: Convert to use device tree.

From: David Daney The device tree will supply the register bank base addresses, make register addressing relative to those. PHY connection is now described by the device tree. The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now unused and interfere with the irq_domain used for devi

[PATCH v3 4/5] staging: octeon_ethernet: Convert to use device tree.

From: David Daney Get MAC address and PHY connection from the device tree. The driver is converted to a platform driver. Signed-off-by: David Daney Acked-by: Grant Likely --- drivers/staging/octeon/ethernet-mdio.c | 28 +++--- drivers/staging/octeon/ethernet.c| 153 +

[PATCH v3 0/5] MIPS: OCTEON: Convert some device to use Device Tree.

From: David Daney This patch set depends on the previous set to add Device Tree to OCTEON. That set can be found among other places here: http://www.linux-mips.org/archives/linux-mips/2012-06/msg00081.html For v3: No functional changes, Added more Acked-bys, rebased to avoid merge conflicts.

[PATCH v3 1/5] i2c: Convert i2c-octeon.c to use device tree.

From: David Daney There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup c

[PATCH v3 2/5] netdev: mdio-octeon.c: Convert to use device tree.

From: David Daney Get the MDIO bus controller addresses from the device tree, small clean up in use of devm_* Remove, now unused, platform device setup code. Acked-by: David S. Miller Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-platform.c | 30 - drivers/net/phy/m

[PATCH v8 2/4] MIPS: Octeon: Add device tree source files.

From: David Daney The two device tree files octeon_3xxx.dts and octeon_68xx.dts are trimmed by code in a subsequent patch to reflect the hardware actually present on the board. To this end several properties that are not part of the declared bindings are added to aid in trimming off unwanted nod

[PATCH v8 4/4] MIPS: Octeon: Setup irq_domains for interrupts.

From: David Daney Create two domains. One for the GPIO lines, and the other for on-chip sources. Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-irq.c | 215 -- 1 files changed, 206 insertions(+), 9 deletions(-) diff --git a/arch/mips/cavium-oct

[PATCH v8 0/4] MIPS: OCTEON: Use Device Tree.

From: David Daney This code has now had extensive testing, it is running on more than 10 different boards and SOC combinations. The patches in this set are all in the arch/mips tree and should probably be merged by Ralf. They do depend on this libfdt patch: http://patchwork.linux-mips.org/patc

[PATCH v8 3/4] MIPS: Octeon: Initialize and fixup device tree.

From: David Daney If a compiled in device tree template is used, trim out unwanted parts based on legacy platform probing. Signed-off-by: David Daney --- arch/mips/Kconfig |2 + arch/mips/cavium-octeon/Makefile |3 + arch/mips/cavium-octeon/octeon-platf

[PATCH v8 1/4] MIPS: Don't define early_init_devtree() and device_tree_init() in prom.c for CPU_CAVIUM_OCTEON

From: David Daney This code is not common enough to be in a shared file, so OCTEON defines it's own versions. When the last of this target specific code is moved out, we can remove all of this. Signed-off-by: David Daney --- arch/mips/kernel/prom.c |2 ++ 1 files changed, 2 insertions(+),

Re: [PATCH 1/2] edac: add support for Calxeda highbank memory controller

Mauro, On 06/06/2012 05:34 PM, Mauro Carvalho Chehab wrote: > Hi Rob, > > Em 06-06-2012 19:02, Rob Herring escreveu: >> From: Rob Herring >> >> Add support for memory controller on Calxeda Highbank platforms. Highbank >> platforms support a single 4GB mini-DIMM with 1-bit correction and 2-bit >>

[PATCH v8 1/1] of/lib: Allow scripts/dtc/libfdt to be used from kernel code

From: David Daney libfdt is part of the device tree support in scripts/dtc/libfdt. For some platforms that use the Device Tree, we want to be able to edit the flattened device tree form. We don't want to burden kernel builds that do not require it, so we gate compilation of libfdt files with CO

[PATCH 2/2] edac: add support for Calxeda highbank L2 cache ecc

From: Rob Herring Add support for L2 ECC on Calxeda highbank platform. Signed-off-by: Rob Herring --- .../devicetree/bindings/arm/calxeda/l2ecc.txt | 17 +++ arch/arm/boot/dts/highbank.dts |6 + drivers/edac/Kconfig |7 + drivers

[PATCH 1/2] edac: add support for Calxeda highbank memory controller

From: Rob Herring Add support for memory controller on Calxeda Highbank platforms. Highbank platforms support a single 4GB mini-DIMM with 1-bit correction and 2-bit detection. Signed-off-by: Rob Herring --- .../devicetree/bindings/arm/calxeda/mem-ctrlr.txt | 17 ++ arch/arm/boot/dts/highban

[PATCH 0/2] EDAC support for Calxeda Highbank

From: Rob Herring This series adds EDAC support for Calxeda Highbank platform L2 and memory ECC hardware. Rob Rob Herring (2): edac: add support for Calxeda highbank memory controller edac: add support for Calxeda highbank L2 cache ecc .../devicetree/bindings/arm/calxeda/l2ecc.txt |

Re: [PATCH v2 8/9] ARM: dts: refresh dts file for arch mmp

On 6/5/2012 7:25 PM, Haojian Zhuang wrote: ... mmp2-brownstone.dts is too complex since both apb&axi are imported. Could we only use flat structure in mmp2-brownstone.dts? See http://dev.laptop.org/~wmb/mmp2-devicetree/mmp2-brownstone-flat.dts

Re: [PATCH v6] MTD: LPC32xx SLC NAND driver

On Wed, 2012-06-06 at 16:27 +0200, Roland Stigge wrote: > >> +#else +#define lpc32xx_nand_resume NULL +#define > >> lpc32xx_nand_suspend NULL +#endif > > > > 0, not NULL. > > Can you please point me to an explanation for this? NULL sounds Right, sorry, that was incorrect. -- Best Regards, Arte

Re: [PATCH v6] MTD: LPC32xx SLC NAND driver

Hi, On 06/06/2012 03:38 PM, Artem Bityutskiy wrote: >> +#else +#define lpc32xx_nand_resume NULL +#define >> lpc32xx_nand_suspend NULL +#endif > > 0, not NULL. Can you please point me to an explanation for this? NULL sounds natural here, since it is used as a pointer, and other nand drivers are a

Re: [PATCH v4] usb: ehci-hcd: notify phy when connect change

On Wed, 6 Jun 2012, Richard Zhao wrote: > It still has below limitations: > - it does not work for multi-phy ehci > - the best place is after debounce, but I can't get > phy there > + /* FIXME: > + * - it does not work for multi-phy ehci > +

Re: [PATCH v6] MTD: LPC32xx SLC NAND driver

On Wed, 2012-06-06 at 11:20 +0200, Roland Stigge wrote: > drivers/mtd/nand/lpc32xx_nand_slc.c | 1060 > ++ Can you please rename it to lpc32xx_slc.c? It is already in the "nand" sub-directory, no need to add "nand" to the file name. -- Best Regards, Artem Bityu

Re: [PATCH v6] MTD: LPC32xx SLC NAND driver

On Wed, 2012-06-06 at 11:20 +0200, Roland Stigge wrote: > +#ifdef CONFIG_PM > +static int lpc32xx_nand_resume(struct platform_device *pdev) > +{ > + struct lpc32xx_nand_host *host = platform_get_drvdata(pdev); > + > + /* Re-enable NAND clock */ > + clk_enable(host->clk); > + > + /*

Re: [PATCH v4] usb: ehci-hcd: notify phy when connect change

On Wed, Jun 06, 2012 at 12:39:55PM +0300, Alexander Shishkin wrote: > Richard Zhao writes: > > > It still has below limitations: > > - it does not work for multi-phy ehci > > - the best place is after debounce, but I can't get > > phy there > > > > Signed-off-by: Richard Zhao > > --- > > driv

[PATCH v6] MTD: LPC32xx SLC NAND driver

This patch adds support for the SLC NAND controller inside the LPC32xx SoC. Signed-off-by: Roland Stigge --- Applies to 3.5-rc1 Changes since v5: * Configurable as "tristate" in Kconfig (was "bool") Changes since v4: * Dropped superfluous error handling of dmaengine_submit() * Added unmapping

[PATCH v5] MTD: LPC32xx MLC NAND driver

This patch adds a driver for the MLC NAND controller of the LPC32xx SoC. Signed-off-by: Roland Stigge --- Applies to v3.5-rc1 + LPC32xx SLC NAND driver (Kconfig + Makefile) Changes since v4: * This patch erroneously changed Kconfig of the _other_ NAND (SLC) driver from "bool" to "tristate". M

Re: [PATCH v5] MTD: LPC32xx SLC NAND driver

On 06/06/2012 10:42 AM, Artem Bityutskiy wrote: > On Mon, 2012-06-04 at 21:25 +0200, Roland Stigge wrote: >> +config MTD_NAND_SLC_LPC32XX + bool "NXP LPC32xx SLC Controller" > > Why bool and not tristate here? Why you force this to be > compiled-in and make it impossible to be a kernel modul

Re: [PATCH v3 04/12] usb: otg: add basic mxs phy driver support

On Fri, May 25, 2012 at 10:24:17AM +0800, Richard Zhao wrote: > mxs phy is used in Freescale i.MX SoCs, for example > imx23, imx28, imx6Q. This patch adds the basic host > support. > > Signed-off-by: Richard Zhao > Signed-off-by: Marek Vasut > Cc: Peter Chen Acked-by: Felipe Balbi > --- > D

[PATCH v3] ASoC: omap-abe-twl6040: Add device tree support

When the board boots with device tree the driver will receive the name of the card, DAPM routing map, phandle for the audio components described in the dts file, mclk speed, and the possibility of detecting the jack detection. The card will be set up based on this information. Since the routing is

Re: [PATCH v3 02/12] usb: chipidea: permit driver bindings pass phy pointer

On Fri, May 25, 2012 at 10:24:15AM +0800, Richard Zhao wrote: > Sometimes, the driver bindings may know what phy they use. > For example, when using device tree, the usb controller may have a > phandler pointing to usb phy. > > Signed-off-by: Richard Zhao > Reviewed-by: Marek Vasut Acked-by: Fe

Re: [PATCH v3 01/12] usb: otg: add notify_connect/notify_disconnect callback

Hi, On Fri, May 25, 2012 at 10:24:14AM +0800, Richard Zhao wrote: > This let usb phy driver has a chance to change hw settings when connect > status change. > > Signed-off-by: Richard Zhao Acked-by: Felipe Balbi > --- > include/linux/usb/otg.h | 21 + > 1 files changed,

Re: [PATCH v5] MTD: LPC32xx SLC NAND driver

On Mon, 2012-06-04 at 21:25 +0200, Roland Stigge wrote: > +config MTD_NAND_SLC_LPC32XX > + bool "NXP LPC32xx SLC Controller" Why bool and not tristate here? Why you force this to be compiled-in and make it impossible to be a kernel module like other drivers are? -- Best Regards, Artem Bityut

Re: [PATCH] MXS: Add DT binding support into stmp3xxx-rtc

Hi, Shawn Guo writes: > On Sun, May 27, 2012 at 04:11:29AM +0200, Marek Vasut wrote: > > Add simple binding for the stmp3xxx-rtc. > > > > Signed-off-by: Marek Vasut > > Cc: Alessandro Zummo > > Cc: devicetree-discuss@lists.ozlabs.org > > Cc: Grant Likely > > Cc: Rob Herring > > Cc: rtc-li...@