Hi guys,
I'm trying to implement a driver that can do both DMA and PIO, and it would be
nice if the user was able to select the mode (on a per-bus basis) using the DT.
The PIO mode can reduce the overhead in some cases and therefore be better
choice than the DMA (for example when most transfers
On Friday, July 20, 2012 7:00 PM, Sylwester Nawrocki wrote:
>
> On 07/20/2012 04:59 AM, Leela Krishna Amudala wrote:
> >> --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
> >> +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
> >> @@ -30,9 +30,16 @@
> >>
> >> #define
On 07/18/2012 11:04 AM, Scott Wood wrote:
> On 07/17/2012 09:38 PM, Rob Herring wrote:
>> On 07/17/2012 08:11 PM, Scott Wood wrote:
>>> Commit 107a84e61cdd3406c842a0e4be7efffd3a05dba6 ("of: match by compatible
>>> property first") breaks the gianfar ethernet driver found on various
>>> Freescale PP
+devicetree-discuss
On 07/22/2012 08:20 PM, Marek Vasut wrote:
> Add DT property "m25p,fast-read" that signalises the particular
> chip supports "fast read" opcode.
>
> NOTE: I'm not sure where to document this property, as m25p80 is
> a simple DT device. Any hints please?
>
> Signed-off-b
Dear Rob Herring,
> +devicetree-discuss
>
> On 07/22/2012 08:20 PM, Marek Vasut wrote:
> > Add DT property "m25p,fast-read" that signalises the particular
> > chip supports "fast read" opcode.
> >
> > NOTE: I'm not sure where to document this property, as m25p80 is
> >
> > a simple DT dev
> -Original Message-
> From: devicetree-discuss [mailto:devicetree-discuss-
> bounces+poonam.aggrwal=freescale@lists.ozlabs.org] On Behalf Of Marek
> Vasut
> Sent: Monday, July 23, 2012 2:58 AM
> To: devicetree-discuss@lists.ozlabs.org
> Cc: pa...@denx.de; Wolfgang Denk
> Subject: For
Dear Aggrwal Poonam-B10812,
> > -Original Message-
> > From: devicetree-discuss [mailto:devicetree-discuss-
> > bounces+poonam.aggrwal=freescale@lists.ozlabs.org] On Behalf Of Marek
> > Vasut
> > Sent: Monday, July 23, 2012 2:58 AM
> > To: devicetree-discuss@lists.ozlabs.org
> > Cc: pa
One option would be to
put a compile time flag in the driver, which prefers PIO than DMA. I
believe by default DMA is the first preference.
Certainly, but please consider you might want to use PIO only on selected
instances of the driver (aka. selected busses, I wasn't probably clear enough,
th
> -Original Message-
> From: devicetree-discuss [mailto:devicetree-discuss-
> bounces+poonam.aggrwal=freescale@lists.ozlabs.org] On Behalf Of Marek
> Vasut
> Sent: Monday, July 23, 2012 9:01 AM
> To: Aggrwal Poonam-B10812
> Cc: pa...@denx.de; devicetree-discuss@lists.ozlabs.org; Wolfg
Dear Poonam,
In message
you wrote:
>
> > I'm trying to implement a driver that can do both DMA and PIO, and it
> > would be nice if the user was able to select the mode (on a per-bus
> > basis) using the DT.
> > The PIO mode can reduce the overhead in some cases and therefore be
> > better cho
On 20 July 2012 16:08, Seungwon Jeon wrote:
> July 20, 2012, Thomas Abraham wrote:
>> On 19 July 2012 09:21, Seungwon Jeon wrote:
[...]
>> >> +static unsigned long exynos5250_dwmmc_caps[4] = {
>> >> + MMC_CAP_UHS_DDR50 | MMC_CAP_1_8V_DDR |
>> >> + MMC_CAP_8_BIT_DATA | MMC_CAP_C
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