On Tue, Jul 24, 2012 at 8:50 AM, John Crispin wrote:
> Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks
> of up to 32 pins.
>
> Signed-off-by: John Crispin
> Signed-off-by: Thomas Langer
> Cc: Linus Walleij
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: linux-ker...
On Tue, Jul 24, 2012 at 8:50 AM, John Crispin wrote:
> Implement support for pinctrl on lantiq/xway socs. The IO core found on these
> socs has the registers for pinctrl, pinconf and gpio mixed up in the same
> register range. As the gpio_chip handling is only a few lines, the driver also
> imple
On Wed, Jul 18, 2012 at 11:20 AM, Peter Ujfalusi wrote:
I think you need to CC DT bindings to devicetree-discuss.
> diff --git a/Documentation/devicetree/bindings/mfd/twl6040.txt
> b/Documentation/devicetree/bindings/mfd/twl6040.txt
> index c855240..2a3d55c 100644
> --- a/Documentation/devicetr
On Mon, Jul 23, 2012 at 9:11 PM, Florian Fainelli wrote:
> [Thomas P]
>> I am surprised that this doesn't use the clocksource and clockevents
>> infrastructure. It probably should, and be implemented in
>> drivers/clocksource/.
>
> This may sound like a stupid question, but the big constraint wit
From: Gyungoh Yoo
The MAX8907 is an I2C-based power-management IC containing voltage
regulators, a reset controller, a real-time clock, and a touch-screen
controller.
The original driver was written by:
* Gyungoh Yoo
Various fixes and enhancements by:
* Jin Park
* Tom Cherry
* Prashant Gaikw
On Fri, Jul 27, 2012 at 09:05:48PM +0900, Alexandre Courbot wrote:
> +++ b/include/linux/power_seq.h
> @@ -0,0 +1,139 @@
> +/*
> + * power_seq.h
> + *
> + * Simple interpreter for defining power sequences as platform data or device
> + * tree properties. Initially designed for use with backlight dr
On Fri, Jul 27, 2012 at 09:05:48PM +0900, Alexandre Courbot wrote:
> Some device drivers (panel backlights especially) need to follow precise
> sequences for powering on and off, involving gpios, regulators, PWMs
> with a precise powering order and delays to respect between each steps.
> These sequ
On Fri, Jul 27, 2012 at 01:33:36PM +0100, Rob Herring wrote:
> On 07/26/2012 02:18 PM, rvasw...@codeaurora.org wrote:
> > Hello,
> >
> > We can specify the interrupt information in the device tree using the arm
> > gic convention.
> > Is there an API to read directly the 1st cell and determine if
On 07/26/2012 02:18 PM, rvasw...@codeaurora.org wrote:
> Hello,
>
> We can specify the interrupt information in the device tree using the arm
> gic convention.
> Is there an API to read directly the 1st cell and determine if an
> interrupt is a PPI or a SPI ? This information is directly relevant
Hi Sylwester,
On Wednesday 18 July 2012 19:00:15 Sylwester Nawrocki wrote:
> On 07/16/2012 01:41 PM, Guennadi Liakhovetski wrote:
> [...]
>
> >> On 07/11/2012 04:27 PM, Guennadi Liakhovetski wrote:
> >>> Hi all
> >>>
> >>> Background
> >>> ==
> >>>
> >>> With ARM adoption of flat Device
On Fri, Jul 27, 2012 at 10:13:04AM +0800, Richard Zhao wrote:
> On Thu, Jul 26, 2012 at 02:11:21PM +0100, Mark Brown wrote:
> > On Thu, Jul 19, 2012 at 11:54:41PM +0800, Shawn Guo wrote:
> > > +Optional properties:
> > > +- transition-latency: Specify the possible maximum transition latency,
> > >
Hello,
I need to find a solution to control 2 bits in CONTROL_DEVCONF0 on OMAP2/3 for
McBSP1 CLKR/FSR signal routing.
In boards using McBSP1 we might need to change bit 3 and 4 based on the audio
setup (how the board has been wired).
So far I have come up with the following idea to handle to but
Hi,
On 07/24/2012 06:45 PM, AnilKumar Ch wrote:
> Adds basic pinctrl support for AM33XX family of devices. This patch
> is based on the pinctrl-simple driver submitted by Tony Lindgren's
> here: http://lwn.net/Articles/496075/
>
> Signed-off-by: AnilKumar Ch
> ---
> arch/arm/boot/dts/am33xx.dts
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