Hi Grant,
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
On Nov 6, 2012, at 12:14 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 10:30 AM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
For
On Tue, Nov 06, 2012 at 20:26:48, Cousson, Benoit wrote:
Hi Anil,
On 11/06/2012 02:48 PM, AnilKumar Ch wrote:
Add device tree date for GPIO based various drivers matrix keypad,
volume keys, push buttons and use leds accross three AM33XX devices
viz EVM, BeagleBone and Starter Kit.
Hi Grant
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
[ snip ]
g.
Since we've started talking about longer term goals, and the versioning
provision seems to stand, I hope we address how much the
On Wed, Nov 07, 2012 at 11:41:41AM +0800, Bo Shen wrote:
Add atmel-ssc for device tree support
Match atmel,at91rm9200-ssc for using pdc for data transfer
Match atmel,at91sam9g45-ssc for using dma for data transfer
Applied, thanks.
signature.asc
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Hi Stephen,
On Nov 6, 2012, at 11:37 PM, Stephen Warren wrote:
On 11/05/2012 01:40 PM, Grant Likely wrote:
Hey folks,
As promised, here is my early draft to try and capture what device
tree overlays need to do and how to get there. Comments and
suggestions greatly appreciated.
On 09:24 Wed 07 Nov , Mark Brown wrote:
On Wed, Nov 07, 2012 at 11:41:41AM +0800, Bo Shen wrote:
Add atmel-ssc for device tree support
Match atmel,at91rm9200-ssc for using pdc for data transfer
Match atmel,at91sam9g45-ssc for using dma for data transfer
Applied, thanks.
Mark I
On Wed, Nov 07, 2012 at 09:47:33AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
Mark I nack the patch series this patch series does not run on any DT kernel
as no picntrl is done
do not apply until this patfh handle the pinctrl
Nicholas seemed to be disagreeing you on that one and his
On Wed, Nov 07, 2012 at 09:49:32AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
yes the pinctrl is mainline in -next via pinctrl tree
s code does not work on the DT kernel untill it's done
NACK stand I refuse this touch the at91 dtsi untiol it's done correctly
...and here's another mail
Add device tree support to matrix keypad driver and usage details
are added to device tree documentation. Driver was tested on AM335x
EVM.
Signed-off-by: AnilKumar Ch anilku...@ti.com
---
This patch was tested on AM335x-EVM and based on linux-next, cleanly
applies on top of input/next
Changes
On Wed, Nov 07, 2012 at 15:02:05, AnilKumar, Chimata wrote:
Add device tree support to matrix keypad driver and usage details
are added to device tree documentation. Driver was tested on AM335x
EVM.
+Stephen
ACK from the reviewers (Rob Herring and Stephen Warren) of earlier
versions will help
On 05.11.2012 14:29, Philip, Avinash wrote:
On Mon, Nov 05, 2012 at 18:28:22, Daniel Mack wrote:
On 05.11.2012 12:03, Philip, Avinash wrote:
On Fri, Nov 02, 2012 at 20:55:56, Daniel Mack wrote:
This patch adds basic DT bindings for OMAP GPMC.
The actual peripherals are instanciated from
On Wednesday, November 07, 2012 3:25 AM Bryan Wu wrote
On Tue, Oct 30, 2012 at 2:45 PM, Marek Belisko
marek.beli...@open-nandra.com wrote:
Support added only for leds (not for gpio's).
Signed-off-by: Marek Belisko marek.beli...@open-nandra.com
---
drivers/leds/leds-tca6507.c | 73
On 11:41 Wed 07 Nov , Bo Shen wrote:
Add atmel-ssc for device tree support
Match atmel,at91rm9200-ssc for using pdc for data transfer
Match atmel,at91sam9g45-ssc for using dma for data transfer
Signed-off-by: Bo Shen voice.s...@atmel.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Hi Panto,
On 11/07/2012 09:13 AM, Pantelis Antoniou wrote:
Hi Grant
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
[ snip ]
g.
Since we've started talking about longer term goals, and the
On Tue, Nov 06, 2012 at 10:59:35PM +, Nicolas Pitre wrote:
On Tue, 6 Nov 2012, Will Deacon wrote:
arch/arm/common/gic.c | 42 ++
1 file changed, 34 insertions(+), 8 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
Hi Will,
thanks for the review on the series.
On Tue, Nov 06, 2012 at 09:50:44PM +, Will Deacon wrote:
On Tue, Oct 16, 2012 at 02:21:45PM +0100, Lorenzo Pieralisi wrote:
When booting through a device tree, the kernel cpu logical id map can be
initialized using device tree data passed by
On 10:21 Wed 07 Nov , Mark Brown wrote:
On Wed, Nov 07, 2012 at 09:49:32AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
yes the pinctrl is mainline in -next via pinctrl tree
s code does not work on the DT kernel untill it's done
NACK stand I refuse this touch the at91 dtsi
Hi Benoit,
On Nov 7, 2012, at 11:19 AM, Benoit Cousson wrote:
Hi Panto,
On 11/07/2012 09:13 AM, Pantelis Antoniou wrote:
Hi Grant
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
[ snip ]
g.
Hi Felipe,
On 11/06/2012 07:22 PM, Felipe Balbi wrote:
Hi,
On Tue, Nov 06, 2012 at 05:58:57PM +0100, Benoit Cousson wrote:
On 11/06/2012 05:44 PM, Felipe Balbi wrote:
Hi,
On Tue, Nov 06, 2012 at 07:26:06PM +0530, Afzal Mohammed wrote:
OMAP2+ family of devices are now obtaining resources
On Wed, Nov 07, 2012 at 10:23:49AM +, Lorenzo Pieralisi wrote:
On Tue, Nov 06, 2012 at 09:50:44PM +, Will Deacon wrote:
+ while ((dn = of_find_node_by_type(dn, cpu)) cpu = nr_cpu_ids) {
+ const u32 *hwid;
+ int len;
+
+ pr_debug( * %s...\n,
On 11/07/2012 12:02 PM, Pantelis Antoniou wrote:
Hi Benoit,
On Nov 7, 2012, at 11:19 AM, Benoit Cousson wrote:
Hi Panto,
On 11/07/2012 09:13 AM, Pantelis Antoniou wrote:
Hi Grant
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
On 11/07/2012 08:32 AM, Andreas Larsson wrote:
On 11/05/2012 10:28 AM, Wolfgang Grandegger wrote:
On 11/01/2012 05:08 PM, Andreas Larsson wrote:
On 2012-10-31 21:21, Wolfgang Grandegger wrote:
...
Yes, the hardware becomes error active after having monitored 11
consecutive recessive bits on
Hi Benoit,
On Nov 7, 2012, at 12:12 PM, Benoit Cousson wrote:
On 11/07/2012 12:02 PM, Pantelis Antoniou wrote:
Hi Benoit,
[snip]
I don't know if this breaks any conventions but seems to work fine for our
case.
Yeah, my main concern with that approach is that you change the
structure
On Wed, Nov 07, 2012 at 11:05:42AM +, Will Deacon wrote:
On Wed, Nov 07, 2012 at 10:23:49AM +, Lorenzo Pieralisi wrote:
On Tue, Nov 06, 2012 at 09:50:44PM +, Will Deacon wrote:
+ while ((dn = of_find_node_by_type(dn, cpu)) cpu =
nr_cpu_ids) {
+
On 11/07/2012 12:15 PM, Wolfgang Grandegger wrote:
On 11/07/2012 08:32 AM, Andreas Larsson wrote:
On 11/05/2012 10:28 AM, Wolfgang Grandegger wrote:
...
This looks good now. Just the automatic restart is missing as described
above.
When doing the bus_off handling as in at91_can, on a
On Wed, Nov 07, 2012 at 11:41:21AM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
On 10:21 Wed 07 Nov , Mark Brown wrote:
Like I say it's not an issue right now and it seems like it should be
trivial to fix. Is anything needed here other than adding the
pinctrl_get_set_default()
On Wed, Nov 07, 2012 at 06:09:53PM +0800, Qing Xu wrote:
From: Qing Xu qi...@marvell.com
Signed-off-by: Qing Xu qi...@marvell.com
Applied, thanks.
+max8925 regulator device register is still handled by mfd_add_devices, not by
+of_xxx, so, it is not necessary to add compatible name. Also,
On Wed, Nov 07, 2012 at 03:30:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
the one via ASoC for the driver with the pinctrl for now but MUST add it later
the arch/arm related via AT91 tree where the pinctrl is mandatory in the dtsi
I'm no going to spend hours to do the pinctrl to
On Wed, 7 Nov 2012, Will Deacon wrote:
On Tue, Nov 06, 2012 at 10:59:35PM +, Nicolas Pitre wrote:
On Tue, 6 Nov 2012, Will Deacon wrote:
/*
+* Get what the GIC says our CPU mask is.
+*/
+ BUG_ON(cpu = 8);
+ cpu_mask =
On 15:44 Wed 07 Nov , Mark Brown wrote:
On Wed, Nov 07, 2012 at 03:30:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
the one via ASoC for the driver with the pinctrl for now but MUST add it
later
the arch/arm related via AT91 tree where the pinctrl is mandatory in the
On Tue, Nov 06, 2012 at 12:16:13, Bedia, Vaibhav wrote:
On Mon, Nov 05, 2012 at 14:42:26, Philip, Avinash wrote:
[...]
+#include linux/of_device.h
+#include linux/pinctrl/consumer.h
Pinctrl changes should be separate patch. Morevoer, you don't mention
that you making this change.
On Tue, Nov 06, 2012 at 12:05:24, Bedia, Vaibhav wrote:
On Mon, Nov 05, 2012 at 14:42:22, Philip, Avinash wrote:
[...]
+pwmss0: pwmss@4830 {
+ compatible = ti,am33xx-pwmss;
+ reg = 0x4830 0x10
+ 0x48300100 0x80
+ 0x48300180 0x80
+ 0x48300200
On Tue, Nov 06, 2012 at 12:16:13, Bedia, Vaibhav wrote:
On Mon, Nov 05, 2012 at 14:42:27, Philip, Avinash wrote:
[...]
+ /* Some platforms require explicit tbclk gating */
+ if (of_property_read_bool(pdev-dev.of_node, tbclkgating)) {
+ pc-tbclk = clk_get(pdev-dev, tbclk);
Hi Kgene,
On Wednesday 07 of November 2012 11:26:42 Kukjin Kim wrote:
Kukjin Kim wrote:
Tomasz Figa wrote:
This patch adds device tree sources for Exynos4x12 SoC series
(currently Exynos4212 and Exynos4412) and enables mach-exynos4-dt
to support these SoCs.
Signed-off-by:
linux,mtd-name allow to specify the mtd name for retro capability with
physmap-flash drivers as boot loader pass the mtd partition via the old
device name physmap-flash.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
On Wed, Nov 07, 2012 at 12:00:52PM +, Lorenzo Pieralisi wrote:
On Wed, Nov 07, 2012 at 11:05:42AM +, Will Deacon wrote:
No, I was thinking about what happens if the devicetree doesn't contain an
mpidr property that matches the boot cpu. In this case, we will fail to
assign logical
On Wed, 2012-11-07 at 09:06 +0100, Pantelis Antoniou wrote:
Hi Grant,
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
On Nov 6, 2012, at 12:14 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 10:30
Hi Mugunthan,
On 11/07/2012 04:24 PM, Mugunthan V N wrote:
On 11/6/2012 11:02 PM, Mugunthan V N wrote:
This patch-series adds support for,
[1/7]: Typo mistake in CPSW driver while invoking runtime_pm api's
[2/7]: Adds parent-child relation between CPSW MDIO module inside
cpsw
On 15:44 Wed 07 Nov , Mark Brown wrote:
On Wed, Nov 07, 2012 at 03:30:46PM +0100, Jean-Christophe PLAGNIOL-VILLARD
wrote:
the one via ASoC for the driver with the pinctrl for now but MUST add it
later
the arch/arm related via AT91 tree where the pinctrl is mandatory in the
Hi,
On Wed, Nov 07, 2012 at 06:55:03PM +0530, Vivek Gautam wrote:
Hi,
On Tue, Nov 6, 2012 at 10:13 PM, Felipe Balbi ba...@ti.com wrote:
On Tue, Nov 06, 2012 at 08:58:49PM +0530, Vivek Gautam wrote:
Adding DWC3 device tree node for Exynos5250 along with the
device address and clock
On 11/07/2012 02:38 AM, AnilKumar, Chimata wrote:
On Wed, Nov 07, 2012 at 15:02:05, AnilKumar, Chimata wrote:
Add device tree support to matrix keypad driver and usage details
are added to device tree documentation. Driver was tested on AM335x
EVM.
+Stephen
ACK from the reviewers (Rob
On 11/07/2012 01:47 AM, Pantelis Antoniou wrote:
Hi Stephen,
On Nov 6, 2012, at 11:37 PM, Stephen Warren wrote:
On 11/05/2012 01:40 PM, Grant Likely wrote:
Hey folks,
As promised, here is my early draft to try and capture what device
tree overlays need to do and how to get there.
On 11/07/2012 03:19 AM, Benoit Cousson wrote:
Hi Panto,
On 11/07/2012 09:13 AM, Pantelis Antoniou wrote:
Hi Grant
On Nov 6, 2012, at 9:45 PM, Grant Likely wrote:
On Tue, Nov 6, 2012 at 7:34 PM, Pantelis Antoniou
pa...@antoniou-consulting.com wrote:
[ snip ]
g.
Since we've started
On Wed, Nov 07, 2012 at 03:35:30PM +, Will Deacon wrote:
On Wed, Nov 07, 2012 at 12:00:52PM +, Lorenzo Pieralisi wrote:
On Wed, Nov 07, 2012 at 11:05:42AM +, Will Deacon wrote:
No, I was thinking about what happens if the devicetree doesn't contain an
mpidr property that
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
highbank and ECME cores happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
Cc: devicetree-discuss@lists.ozlabs.org
Cc:
Hi Vivek,
On 11/06/2012 04:36 PM, Vivek Gautam wrote:
Adding base address information and required platform data
support for enabling USB DRD phy on exynos5250 SOC.
Signed-off-by: Vivek Gautamgautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi|3 ++-
On 11/07/2012 12:32 PM, Mark Langsdorf wrote:
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
highbank and ECME cores happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf
On 11/07/2012 02:35 PM, Vivek Gautam wrote:
@@ -180,10 +273,12 @@ enum samsung_cpu_type {
/*
* struct samsung_usbphy - transceiver driver state
* @phy: transceiver structure
+ * @phy3: transceiver structure for USB 3.0
* @plat: platform data
* @dev: The parent device supplied
On 11/06/2012 02:47 PM, Murali Karicheri wrote:
This is a platform driver for asynchronous external memory interface
available on TI SoCs. This driver was previously located inside the
mach-davinci folder. As this DaVinci IP is re-used across multiple
family of devices such as c6x, keystone
On 11/06/2012 02:47 PM, Murali Karicheri wrote:
DaVinci NAND driver is a controller driver based on the AEMIF hardware
IP found on TI SoCs. It is also used on SoCs that are not DaVinci based. This
patch removes the driver dependency on DaVinci architecture so that it
can be used on other
On Tue, Nov 6, 2012 at 2:33 AM, Alex Courbot acour...@nvidia.com wrote:
How about, in a first time (and because I'd also like to get the power seqs
moving on), a typedef from int to gpio_handle_t and a first implementation of
the gpio_handle_*() API that would just call the existing
On Mon, Nov 5, 2012 at 6:35 PM, Stephen Warren swar...@wwwdotorg.org wrote:
[Me]
gpio_get() should get an abstract handle just like clk_get() or
regulator_get(), not a fixed numeral.
I don't really see why the return type of gpio_get() influences whether
it can be implemented or not.
It
Hi Stephen,
On Nov 7, 2012, at 6:18 PM, Stephen Warren wrote:
On 11/07/2012 01:47 AM, Pantelis Antoniou wrote:
Hi Stephen,
On Nov 6, 2012, at 11:37 PM, Stephen Warren wrote:
On 11/05/2012 01:40 PM, Grant Likely wrote:
Hey folks,
As promised, here is my early draft to try and capture
This function finds the struct backlight_device for a given device tree
node. A dummy function is provided so that it safely compiles out if OF
support is disabled.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/video/backlight/backlight.c | 17 +
On 11/07/2012 01:55 PM, Marek Belisko wrote:
diff --git a/Documentation/devicetree/bindings/leds/tca6507.txt
b/Documentation/devicetree/bindings/leds/tca6507.txt
+LEDs conected to tca6507
+
+Required properties:
+- compatible : should be : leds-tca6507.
ti,tca6507 would be more typical.
Hi Jon,
* Tony Lindgren t...@atomide.com [121106 16:48]:
* Jon Hunter jon-hun...@ti.com [121102 12:01]:
g...@github.com:jonhunter/linux.git dev-dt-timer
Thanks pulling into omap-for-v3.8/dt branch.
Looks like omap-for-v3.8/dt boots OK on blaze when booted
with device tree, but then
Tomasz Figa wrote:
[...]
+/include/ exynos4x12-pinctrl.dtsi
BTW, I think, above line should be added when exynos4x12-pinctrl patches
applied.
Yes, you are right. Seems like a rebase error on my side. Can you fix it
or should I send a fixed version?
I did, thanks ;-)
Best
On Wed, Nov 07, 2012 at 22:27:10, Stephen Warren wrote:
On 11/07/2012 02:38 AM, AnilKumar, Chimata wrote:
On Wed, Nov 07, 2012 at 15:02:05, AnilKumar, Chimata wrote:
Add device tree support to matrix keypad driver and usage details
are added to device tree documentation. Driver was tested
On Thursday 08 November 2012 05:24:19 Linus Walleij wrote:
I would prefer to create, e.g. in linux/gpio/consumer.h
something like:
struct gpio;
struct gpio *gpio_get(struct device *dev, const char *name);
int gpio_get_value(struct gpio *g);
Nothing more! I.e. struct gpio is an opaque
On Thursday 08 November 2012 05:24:19 Linus Walleij wrote:
On Tue, Nov 6, 2012 at 2:33 AM, Alex Courbot acour...@nvidia.com wrote:
How about, in a first time (and because I'd also like to get the power
seqs
moving on), a typedef from int to gpio_handle_t and a first implementation
of the
Changes from v1:
- Changed the device node names from 'ehci' and 'ohci' to
'usb@1211' and 'usb@1212' as per discussion for the
change 'http://www.spinics.net/lists/linux-usb/msg73993.html'
- Rebased on for-next branch of linux-samsung.
Vivek Gautam (2):
ARM: Exynos5250: Enabling
Adding EHCI device tree node for Exynos5250 along with
the device base adress and gpio line for vbus.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by: Jingoo Han jg1@samsung.com
---
.../devicetree/bindings/usb/exynos-usb.txt | 25
Adding OHCI device tree node for Exynos5250 along with
the device base address.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Acked-by: Jingoo Han jg1@samsung.com
---
.../devicetree/bindings/usb/exynos-usb.txt | 15 +++
arch/arm/boot/dts/exynos5250.dtsi
In AM33xx PWM sub modules like ECAP, EHRPWM EQEP are integrated to
PWM subsystem. All these submodules shares the resources (clock) has
a clock gating register in PWM Subsystem. This patch series creates a
parent PWM Subsystem driver to handle access synchronization of shared
resources clock
In some platforms (like am33xx), PWM sub modules (ECAP, EHRPWM, EQEP)
are integrated to PWM subsystem. These PWM submodules has resources
shared and only one register bit-field is provided to control
module/clock enable/disable, makes it difficult to handle common
resources from independent PWMSS
EHRPWM module requires explicit clock gating from control module.
Hence add clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 17e3de5... 833260f... M arch/arm/mach-omap2/clock33xx_data.c
:100644 100644 a89e825... c0e34e6... M
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP EHRPWM).
To handle resource sharing IP integration
1. Rework on parent child relation between PWMSS and
ECAP, EQEP EHRPWM child devices to support runtime PM.
2. Add support for
This patch
1. Add support for device-tree binding for ECAP APWM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member
Enable pinctrl for pwm-tiecap
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 0d43266... 6071f7a... M drivers/pwm/pwm-tiecap.c
drivers/pwm/pwm-tiecap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiecap.c
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in
Enable pinctrl for pwm-tiehrpwm
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 fba7f9b... 07911e6... M drivers/pwm/pwm-tiehrpwm.c
drivers/pwm/pwm-tiehrpwm.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiehrpwm.c
Some platforms (like AM33XX) requires clock gating from control module
explicitly for TBCLK. Enabling of this clock required for the
functioning of the time base sub module in EHRPWM module. So adding
optional TBCLK handling if DT node populated with tbclkgating. This
helps the driver can coexist
Add PWMSS device tree nodes in relation with ECAP EHRPWM DT nodes to
AM33XX SoC family. Also populates device tree nodes for ECAP EHRPWM by
adding necessary properties like pwm-cells, base reg set disabled as
status.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644
PWM output from ecap0 uses as backlight source. Also adds low threshold
value to have a uniform divisions in brightness-levels scales.
Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
:100644 100644 185d632... 9857050... M arch/arm/boot/dts/am335x-evm.dts
arch/arm/boot/dts/am335x-evm.dts
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