Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
On Fri, Dec 14, 2012 at 05:45:27PM +0100, Guennadi Liakhovetski wrote:
Extend DT interrupt controller initialisation to automatically fall back to
platform data based configuration, if booting without DT. This simplifies
implementing
Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
On Fri, Dec 14, 2012 at 05:45:29PM +0100, Guennadi Liakhovetski wrote:
For boards booting without DT no changes should be caused by this patch.
When booting with DT, devices, whose drivers support DT probing, will not
be registered.
Hi Jon,
On 12/14/2012 10:18 PM, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430.
But where is the omap4430 node then?
Hi Iwamatsu-san,
Thank your for the patch.
On Saturday 15 December 2012 18:03:36 Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Add information of device node to struct intc_desc.
Cc: Magnus Damm d...@opensource.se
Signed-off-by: Nobuhiro Iwamatsu
Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Cc: Magnus Damm d...@opensource.se
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Simon Horman horms+rene...@verge.net.au
What happened to intcs
Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
This is in preparation for initialising INTC using DT.
The proposed INTC configuration is not complete and does
not allow the TMU to be initialised, to exclude it when using DT.
Not sure why you decide to not include incs, as I said, it is
On Wed, Nov 28, 2012 at 01:50:57PM -0200, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Fix the examples so that they are consistent with the dtsi file.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Applied, thanks
Sascha
---
On 12/17/2012 10:39 AM, Jean-Christophe PLAGNIOL-VILLARD :
On 11:24 Wed 21 Nov , Mark Brown wrote:
On Wed, Nov 21, 2012 at 10:17:09AM +0800, Bo Shen wrote:
Add pinctrl support for atmel ssc peripheral
Signed-off-by: Bo Shen voice.s...@atmel.com
Acked-by: Mark Brown
On 01:03 Sat 15 Dec , Grant Likely wrote:
On Wed, 12 Dec 2012 16:13:08 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 14:37 Fri 23 Nov , Nicolas Ferre wrote:
On 11/23/2012 01:44 PM, Jean-Christophe PLAGNIOL-VILLARD :
the atmel_spi use only gpio for chip
On Mon, Dec 17, 2012 at 11:23:20AM +0100, Nicolas Ferre wrote:
Mark, what about rebasing this one on top of current Linus' tree
(toguether with the one that you have just applied on the topic/atmel
branch: (ASoC: atmel-ssc: change disable to disable in dts node)?
I hope that once reworked,
This patch adds dynamic switching to booting either with or without DT.
So far only a part of the board initialisation can be done via DT. Devices,
that still need platform data are kept that way. Devices, that can be
initialised from DT will not be supplied from the platform data, if a DT
image
On 12/17/2012 12:18 AM, Hiroshi Doyu wrote:
Set Snoop Control Unit(SCU) register base address dynamically from DT.
Signed-off-by: Hiroshi Doyu hd...@nvidia.com
---
arch/arm/mach-tegra/platsmp.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git
On 12/17/2012 06:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
of frame achieve or not.
- Hw controlled RTS and CTS flow control to reduce SW
On 12/17/2012 02:16 AM, Benoit Cousson wrote:
Hi Jon,
On 12/14/2012 10:18 PM, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
Hi Jon,
On 12/17/2012 04:58 PM, Jon Hunter wrote:
On 12/17/2012 02:16 AM, Benoit Cousson wrote:
Hi Jon,
On 12/14/2012 10:18 PM, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for
On Thu, Dec 13, 2012 at 07:21:30PM +, Jon Hunter wrote:
On 12/13/2012 11:41 AM, Will Deacon wrote:
On Wed, Dec 12, 2012 at 09:43:05PM +, Jon Hunter wrote:
Adds a device-tree binding for the ARM Cross Trigger Interface (CTI).
The ARM Cross Trigger Interface provides a way to route
On 12/17/2012 10:20 AM, Mark Rutland wrote:
On Thu, Dec 13, 2012 at 07:21:30PM +, Jon Hunter wrote:
On 12/13/2012 11:41 AM, Will Deacon wrote:
On Wed, Dec 12, 2012 at 09:43:05PM +, Jon Hunter wrote:
Adds a device-tree binding for the ARM Cross Trigger Interface (CTI).
The ARM Cross
On Sun, 16 Dec 2012 22:36:56 +0100 (CET), Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
Hi Grant
On Sun, 16 Dec 2012, Grant Likely wrote:
On Fri, 14 Dec 2012 17:45:30 +0100, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
This patch adds dynamic switching to booting either
On Fri, Dec 14, 2012 at 09:26:37PM +, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430.
Signed-off-by: Jon Hunter
Hi Grant
On Mon, 17 Dec 2012, Grant Likely wrote:
On Sun, 16 Dec 2012 22:36:56 +0100 (CET), Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
Hi Grant
On Sun, 16 Dec 2012, Grant Likely wrote:
On Fri, 14 Dec 2012 17:45:30 +0100, Guennadi Liakhovetski
g.liakhovet...@gmx.de
On Sun, 16 Dec 2012 22:36:56 +0100 (CET), Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
Hi Grant
On Sun, 16 Dec 2012, Grant Likely wrote:
On Fri, 14 Dec 2012 17:45:30 +0100, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
This patch adds dynamic switching to booting either
On 12/17/2012 10:38 AM, Mark Rutland wrote:
On Fri, Dec 14, 2012 at 09:26:37PM +, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
On Mon, 17 Dec 2012 13:40:45 +0100 (CET), Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
This patch adds dynamic switching to booting either with or without DT.
So far only a part of the board initialisation can be done via DT. Devices,
that still need platform data are kept that way.
On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan ldewan...@nvidia.com
wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
of frame achieve or not.
- Hw controlled RTS
On Mon, 17 Dec 2012 11:13:51 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 01:03 Sat 15 Dec , Grant Likely wrote:
On Wed, 12 Dec 2012 16:13:08 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 14:37 Fri 23 Nov , Nicolas Ferre wrote:
On 12/17/2012 05:58 PM, Jon Hunter wrote:
On 12/17/2012 10:38 AM, Mark Rutland wrote:
On Fri, Dec 14, 2012 at 09:26:37PM +, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for
Add device-tree PMU support for OMAP2, OMAP3 and OMAP4460. OMAP4430
is not included because PMU is not currently supported on this device
due to absence of a cross-trigger interface driver.
Tested with PERF on OMAP3430 Beagle Board and OMAP4460 Panda Board.
Boot tested only on OMAP2420 H4.
Jon
If device-tree is present, then do not create the PMU device from within
the OMAP specific PMU code. This is required to allow device-tree to
create the PMU device from the PMU device-tree node.
PMU is not currently supported for OMAP4430 (due to a dependency on
having a cross-trigger interface
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430. The node for OMAP4430 is not included because PMU is not
currently supported on OMAP4430 due to the
On Mon, Dec 17, 2012 at 7:59 PM, Stéphane Marchesin
stephane.marche...@gmail.com wrote:
And
fimd, as display controller, could be controlled by linux framebuffer or drm
framework.
I don't think it's a valid point. If the framebuffer is properly done
on top of the DRM, you don't need all of
On 12/13/2012 11:59 PM, Venu Byravarasu wrote:
As Tegra USB host driver is using instance number for resetting
PORT0 twice, adding a new DT property for handling this.
Alan, Greg, Felip,e
This series looks fine to me.
I'd like to take all the Tegra-related USB patches through the Tegra
tree
On Mon, Dec 17, 2012 at 02:07:59PM -0700, Stephen Warren wrote:
On 12/13/2012 11:59 PM, Venu Byravarasu wrote:
As Tegra USB host driver is using instance number for resetting
PORT0 twice, adding a new DT property for handling this.
Alan, Greg, Felip,e
This series looks fine to me.
On 12/17/2012 08:24 AM, Rob Herring wrote:
On 12/17/2012 06:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
of frame achieve or not.
- Hw
On 12/17/2012 10:10 AM, Grant Likely wrote:
On Mon, 17 Dec 2012 17:40:49 +0530, Laxman Dewangan ldewan...@nvidia.com
wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
On 12/17/2012 05:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
of frame achieve or not.
- Hw controlled RTS and CTS flow control to reduce SW
On 12/17/2012 11:36 AM, Stephen Warren wrote:
On 12/17/2012 05:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know whether end
of frame achieve or not.
- Hw
On 12/17/2012 02:58 PM, Mitch Bradley wrote:
On 12/17/2012 11:36 AM, Stephen Warren wrote:
On 12/17/2012 05:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
- End Of Data interrupt in incoming data to know
On 12/17/2012 07:00 AM, Rob Herring wrote:
On 12/17/2012 12:18 AM, Hiroshi Doyu wrote:
Set Snoop Control Unit(SCU) register base address dynamically from DT.
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
static void __init tegra_smp_init_cpus(void)
{
-
On 12/17/2012 12:04 PM, Stephen Warren wrote:
On 12/17/2012 02:58 PM, Mitch Bradley wrote:
On 12/17/2012 11:36 AM, Stephen Warren wrote:
On 12/17/2012 05:10 AM, Laxman Dewangan wrote:
Nvidia's Tegra has multiple uart controller which supports:
- APB dma based controller fifo read/write.
-
On Mon, Dec 17, 2012 at 09:29:44AM +0100, Laurent Pinchart wrote:
Hi Iwamatsu-san,
Thank your for the patch.
On Saturday 15 December 2012 18:03:36 Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Add information of device node to struct intc_desc.
Cc:
On Mon, Dec 17, 2012 at 09:44:10AM +0100, Guennadi Liakhovetski wrote:
Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Cc: Magnus Damm d...@opensource.se
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
On Mon, Dec 17, 2012 at 10:58:39AM +0100, Guennadi Liakhovetski wrote:
Hi Simon
On Sat, 15 Dec 2012, Simon Horman wrote:
This is in preparation for initialising INTC using DT.
The proposed INTC configuration is not complete and does
not allow the TMU to be initialised, to exclude it
Hi,
I'd like to propose a binding for gate clocks so that we can discuss how
descriptive devicetree clock bindings should be.
Binding for simple gate clocks.
This binding uses the common clock binding[1].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
Required properties:
-
Based on patches for samsung-usbphy driver available at:
https://patchwork.kernel.org/patch/1794651/
In this patch we are adding support to parse device tree data for
samsung-usbphy driver and further setting pmu_isolation to
enable/disable phy as and when needed.
This further chucks out the need
Adding support to parse device node data in order to get
required properties to set pmu isolation for usb-phy.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
.../devicetree/bindings/usb/samsung-usbphy.txt | 10 +++
drivers/usb/phy/samsung-usbphy.c | 80
On 21:19 Wed 28 Nov , Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:59 Mon 26 Nov , Grant Likely wrote:
On Wed, 21 Nov 2012 11:14:08 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
allow to specify a name to an exported gpio
Signed-off-by:
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