Dear Mike Turquette,
On Wed, 15 May 2013 14:41:54 -0700, Mike Turquette wrote:
Quoting Thomas Petazzoni (2013-05-15 06:25:19)
The Armada 370 has two gatable clocks for each PCIe interface, and we
want both of them to be enabled. We therefore make one of the two
clocks a child of the other,
Hi Laurent
On Wed, 15 May 2013, Laurent Pinchart wrote:
Add GPIO controller nodes to the r8a7790 core device tree.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
arch/arm/boot/dts/r8a7790.dtsi | 54
++
1 file
On 05/16/2013 09:44 AM, Thomas Petazzoni wrote:
Dear Mike Turquette,
On Wed, 15 May 2013 14:41:54 -0700, Mike Turquette wrote:
Quoting Thomas Petazzoni (2013-05-15 06:25:19)
The Armada 370 has two gatable clocks for each PCIe interface, and we
want both of them to be enabled. We therefore
Hi Linus,
On 15/05/13 20:07, Linus Walleij wrote:
On Tue, May 14, 2013 at 2:22 PM, James Hogan james.ho...@imgtec.com wrote:
I think that's the other way around, i.e. that's talking about mapping
several pingroups to the same function. The next paragraph is closer to
the problem:
On Wed, May 15, 2013 at 03:25:21PM +0200, Thomas Petazzoni wrote:
[..]
+
+static int __init mvebu_pcie_probe(struct platform_device *pdev)
+{
+ struct mvebu_pcie *pcie;
+ struct device_node *np = pdev-dev.of_node;
+ struct of_pci_range range;
+ struct of_pci_range_parser
On 15/05/13 23:31, Stephen Boyd wrote:
On 05/10/13 08:02, James Hogan wrote:
This adds a metag architecture specific clk-gate and clk-mux which
extends the generic ones to use global lock2 to protect the register
fields. It is common with metag to have an RTOS running on a different
thread or
Hi,
On 05/16/2013 06:53 AM, Prabhakar Lad wrote:
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt
b/Documentation/devicetree/bindings/media/video-interfaces.txt index
e022d2d..6bf87d0 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++
On 05/15/2013 02:52 PM, Lad Prabhakar wrote:
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt
b/Documentation/devicetree/bindings/media/video-interfaces.txt
index e022d2d..6bf87d0 100644
--- a/Documentation/devicetree/bindings/media/video-interfaces.txt
+++
Hi Sylwester,
On Thu, May 16, 2013 at 4:13 PM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
Hi,
On 05/16/2013 06:53 AM, Prabhakar Lad wrote:
[Snip]
May be we rename field-active to fid-pol ?
I guess we failed to clearly describe the 'field-even-active' property then.
It seems
Hi Sylwester,
Thanks for the review.
On Thu, May 16, 2013 at 4:15 PM, Sylwester Nawrocki
sylvester.nawro...@gmail.com wrote:
On 05/15/2013 02:52 PM, Lad Prabhakar wrote:
diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt
Hi Guennadi,
On Thursday 16 May 2013 09:57:20 Guennadi Liakhovetski wrote:
On Wed, 15 May 2013, Laurent Pinchart wrote:
Add GPIO controller nodes to the r8a7790 core device tree.
Signed-off-by: Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com
---
Hi Guennadi,
On Wednesday 15 May 2013 16:03:10 Guennadi Liakhovetski wrote:
Hi Laurent
Thanks for your work on this! Sorry for jumping in so late in the game.
No worries.
Let's do it this way: I don't think my comments are serious enough to
enforce a v4. If noone else complains, I'm fine
Hi Prabhakar,
Thank you for the patch.
On Tuesday 14 May 2013 16:30:36 Lad Prabhakar wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
add OF support for the tvp514x driver. Alongside this patch
removes unnecessary header file inclusion and sorts them alphabetically.
Signed-off-by:
Hi Prabhakar,
Thank you for the patch.
On Monday 13 May 2013 10:47:04 Lad Prabhakar wrote:
From: Lad, Prabhakar prabhakar.cse...@gmail.com
add OF support for the mt9p031 sensor driver.
Alongside this patch sorts the header inclusion alphabetically.
Signed-off-by: Lad, Prabhakar
Hi Laurent,
Thanks for the review.
On Thu, May 16, 2013 at 5:40 PM, Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
Hi Prabhakar,
[Snip]
+
+ pdata = devm_kzalloc(client-dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
I've started playing with the V4L2 OF bindings, and
Hi Prabhakar,
On Thursday 16 May 2013 18:13:38 Prabhakar Lad wrote:
On Thu, May 16, 2013 at 5:40 PM, Laurent Pinchart wrote:
Hi Prabhakar,
[Snip]
+
+ pdata = devm_kzalloc(client-dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
I've started playing with the V4L2 OF
Hi Laurent,
On Thu, May 16, 2013 at 6:20 PM, Laurent Pinchart
laurent.pinch...@ideasonboard.com wrote:
Hi Prabhakar,
On Thursday 16 May 2013 18:13:38 Prabhakar Lad wrote:
On Thu, May 16, 2013 at 5:40 PM, Laurent Pinchart wrote:
Hi Prabhakar,
[Snip]
+
+ pdata =
From: Lad, Prabhakar prabhakar.cse...@gmail.com
This patch adds sync-on-green property as part of
endpoint properties and also support to parse them in the parser.
Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com
Cc: Hans Verkuil hans.verk...@cisco.com
Cc: Laurent Pinchart
Mike, Sebastian,
On Thu, May 16, 2013 at 10:26:24AM +0200, Sebastian Hesselbarth wrote:
On 05/16/2013 09:44 AM, Thomas Petazzoni wrote:
Dear Mike Turquette,
On Wed, 15 May 2013 14:41:54 -0700, Mike Turquette wrote:
Quoting Thomas Petazzoni (2013-05-15 06:25:19)
The Armada 370 has two
For legacy reasons, the __cpu_logical_map array is initialized to 0.
On old pre-DT ARM platforms, smp_setup_processor_id() generates
__cpu_logical_map entries at boot before the number of possible CPUs is
set-up, with values that can be considered valid MPIDRs even if they are
not present in the
As the number of CPUs increase, the temporary array allocated on the
stack in arm_dt_init_cpu_maps() can become too big and trigger stack
issues.
This patch moves the allocated memory to static __initdata so that stack
data is not used anymore to allocate the temporary array.
Memory is marked as
On Thu, May 16, 2013 at 06:33:14AM -0300, Ezequiel Garcia wrote:
On Wed, May 15, 2013 at 03:25:21PM +0200, Thomas Petazzoni wrote:
[..]
+
+static int __init mvebu_pcie_probe(struct platform_device *pdev)
+{
+ struct mvebu_pcie *pcie;
+ struct device_node *np = pdev-dev.of_node;
+
Hi Russell, Rob,
this series contains simple fixes/improvements related to the DT
cpu_logical_map initialization code. I would like to get these patches
in in order to have a stable base on top of which I can send the DT topology
bindings and cpu_logical_map bindings/parsing code updates for arm
Dear Jason Cooper,
On Thu, 16 May 2013 11:40:31 -0400, Jason Cooper wrote:
+static int mvebu_pcie_init(void)
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll fix this up when I pull this in, no need to resend. :)
I'll resend, because
On Fri, May 3, 2013 at 11:32 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
include/linux/of_net.h:16: warning: type qualifiers ignored on function
return type
Signed-off-by: Geert Uytterhoeven ge...@linux-m68k.org
---
include/linux/of_net.h |4 ++--
1 files changed, 2
On Thu, May 16, 2013 at 05:49:03PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 16 May 2013 11:40:31 -0400, Jason Cooper wrote:
+static int mvebu_pcie_init(void)
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll
Hello,
This series of patches introduces PCIe support for the Marvell Armada
370 and Armada XP.
I'd like this code to be merged for 3.11.
For easier testing, the code has been pushed to:
git://github.com/MISL-EBU-System-SW/mainline-public.git marvell-pcie-v10
This PATCHv10 follows:
*
Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use
the range property') all the device nodes of Armada 370/XP are under a
common 'ranges' property that translates the device register addresses
into their absolute address, thanks to the base address of the
internal register
From: Andrew Murray andrew.mur...@arm.com
This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges property without relying on architecture specific
DT handling. This
From: Thierry Reding thierry.red...@avionic-design.de
This function can be used to parse the device and function number from a
standard 5-cell PCI resource. PCI_SLOT() and PCI_FUNC() can be used on
the returned value obtain the device and function numbers respectively.
Signed-off-by: Thierry
Now that the PCIe driver for mvebu has been integrated and all its
relevant dependencies, we can mark the ARCH_MVEBU platform has
MIGHT_HAVE_PCI, which allows to select the PCI bus support if needed.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
This driver implements the support for the PCIe interfaces on the
Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to
cover earlier families of Marvell SoCs, such as Dove, Orion and
Kirkwood.
The driver implements the hw_pci operations needed by the core ARM PCI
code to setup
Now that we have the necessary drivers and Device Tree informations to
support PCIe on Armada 370 and Armada XP, enable the CONFIG_PCI
option.
Also, since the Armada 370 Mirabox has a built-in USB XHCI controller
connected on the PCIe bus, enable the corresponding options as well.
Signed-off-by:
On Thu, May 16, 2013 at 04:34:07PM +0100, Lorenzo Pieralisi wrote:
For legacy reasons, the __cpu_logical_map array is initialized to 0.
On old pre-DT ARM platforms, smp_setup_processor_id() generates
__cpu_logical_map entries at boot before the number of possible CPUs is
set-up, with values
From: Thierry Reding thierry.red...@avionic-design.de
This function can be used to parse a bus-range property as specified by
device nodes representing PCI bridges.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/of/of_pci.c| 25 +
Dear Jason Cooper,
On Thu, 16 May 2013 11:56:17 -0400, Jason Cooper wrote:
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll fix this up when I pull this in, no need to resend. :)
I'll resend, because beyond this function
On Thu, May 16, 2013 at 06:08:50PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 16 May 2013 11:56:17 -0400, Jason Cooper wrote:
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll fix this up when I pull this in,
* Jon Hunter jon-hun...@ti.com [130430 07:16]:
Commit 8c8a777 (ARM: OMAP2+: Add function to read GPMC settings from
device-tree) added a device-tree property gpmc,device-nand to indicate
is the GPMC child device is NAND. This commit should have updated the
GPMC NAND documentation
On Thu, May 16, 2013 at 04:50:38PM +0100, Will Deacon wrote:
On Thu, May 16, 2013 at 04:34:07PM +0100, Lorenzo Pieralisi wrote:
For legacy reasons, the __cpu_logical_map array is initialized to 0.
On old pre-DT ARM platforms, smp_setup_processor_id() generates
__cpu_logical_map entries at
On Thu, May 16, 2013 at 10:35 AM, Dan Murphy dmur...@ti.com wrote:
I am not sure you really want to do this.
If I make the pinctrl part of the led structure then the only way the
gpio_wk7 on a1-a3 to be configured is when
the CONFIG_LEDS_GPIO flag is set.
Do you really want that dependency?
On 05/16/13 02:56, James Hogan wrote:
On 15/05/13 23:31, Stephen Boyd wrote:
On 05/10/13 08:02, James Hogan wrote:
This adds a metag architecture specific clk-gate and clk-mux which
extends the generic ones to use global lock2 to protect the register
fields. It is common with metag to have an
On Thu, May 16, 2013 at 3:58 PM, Sergei Shtylyov
sergei.shtyl...@cogentembedded.com wrote:
Hello.
On 03/01/2013 05:02 PM, Rob Herring wrote:
Fix the following compilation warnings (in Simon Horman's
renesas.git repo):
In file included from arch/arm/mach-shmobile/setup-r8a7779.c:24:0:
On Thu, May 02, 2013 at 07:23:15PM +0400, Alexander Popov wrote:
This module tests Direct Memory Access to some device on LocalPlus Bus
for Freescale MPC512x. In other words it tests the bundle
of mpc512x_lpbfifo and mpc512x_dma drivers.
This testing driver was multiply used with static RAM
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