On Tuesday, June 11, 2013 12:22 AM, Arnd Bergmann wrote:
On Monday 10 June 2013, Jingoo Han wrote:
On Saturday, June 08, 2013 2:43 AM, Arnd Bergmann wrote:
For multiple domains, how can I fix the DT properties?
Domains are a Linux concept, you have to pick a new domain number for each
After switching to CCF, driver and device tree nodes are required
to be update with clock information. This set includes those changes.
After these patches, the only missing portion is hdmiphy power control
which is posted independently. Together, basic hdmi is working for
exynos5250.
Rahul
From: Sean Paul seanp...@chromium.org
Change the clk_enable/clk_disable calls in mixer and hdmi drivers into
clk_prepare_enable/clk_disable_unprepare, respectively.
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Fix wrong clock numbers in hdmi dt node. Removed hdmiphy
clock which was a dummy clock earlier and not required now.
Also added mux clock to change the clock parent.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |6 +++---
1 file changed, 3
HDMI driver needs to configure the mout_hdmi mux clock to change
the parent between sclk_hdmiphy and sclk_pixel.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git
From: Sean Paul seanp...@chromium.org
This patch adds the mixer clocks to the mixer node in the dts file.
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |2 ++
1 file changed, 2 insertions(+)
diff
PWM nodes are added to Exynos4210 pinctrl DT file.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 28
1 file changed, 28 insertions(+)
diff --git
This series is based on for-next branch of Kukjin's tree.
Tested on Origen board.
Changes since v1:
* Split LCD patch into LCD and PWM as suggested by Tomasz Figa.
* Added all PWM output nodes to pinctrl dtsi file.
Sachin Kamat (3):
ARM: dts: exynos4210: Add PWM related pinctrl entries
ARM:
Adds pinctrl entries required by FIMD.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 61 +
1 file changed, 61 insertions(+)
diff --git
Added FIMD and display timing node to Origen4210 board.
Signed-off-by: Sachin Kamat sachin.ka...@linaro.org
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
---
No change since v1.
---
arch/arm/boot/dts/exynos4210-origen.dts | 21 +
1 file changed, 21 insertions(+)
From: Tushar Behera tushar.beh...@linaro.org
The LDO for LCD driver is currently not handled by any of the drivers.
This disables the LDO during booting time. To fix this, the LDO
is forced to enabled always.
Signed-off-by: Tushar Behera tushar.beh...@linaro.org
Signed-off-by: Sachin Kamat
Previous to CCF, hdmiphy is added as a dummy clock in clock file for
exynos SoCs. Enable/Disable to this clock, actually toggles the power
control bit in PMU, instead of controlling the clock gate.
Patch adds the support to parse hdmiphy control node which is a child
node to hdmi, and map the pmu
Previously, hdmiphy is added as a dummy clock in clock file for
exynos SoCs. Enable/Disable to this clock, actually toggles the power
control bit in PMU, instead of controlling the clock gate.
This RFC adds the support to parse hdmiphy control node which is a child
node to hdmi, and map the pmu
Add hdmiphy power control node as a child to hdmi node. This
node will be parsed by hdmi driver to map phy control pmu reg and
control the phy power.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
arch/arm/boot/dts/exynos5250.dtsi |6 ++
1 file changed, 6 insertions(+)
diff
On 11/06/13 00:19, Russell King - ARM Linux wrote:
On Mon, Jun 10, 2013 at 12:46:59PM +0100, Srinivas KANDAGATLA wrote:
+ aux_ctrl = (0x1 L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
+ (0x1 L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
+ (0x1
On 10/06/13 15:02, Arnd Bergmann wrote:
There are multiple ways of doing that, e.g. you could export a function
from syscon.c that you call to register the device node and then import
the regmap from syscon into your high-level driver again.
Hi Arnd/Linus,
Thankyou for your comments,
I did
On Tue, Jun 11, 2013 at 05:40:36AM +0100, Jassi Brar wrote:
On 11 June 2013 00:04, Will Deacon will.dea...@arm.com wrote:
The PL330 driver probes the peripheral and primecell IDs of the device to
make sure that it is indeed an AMBA PL330. However, it does this by
making byte accesses to a
On Thu, 6 Jun 2013, Sebastian Hesselbarth wrote:
This patch adds an irqchip driver for the main interrupt controller found
on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, Discovery Innovation).
Corresponding device tree documentation is also added.
Signed-off-by: Sebastian Hesselbarth
On Tue, Jun 11, 2013 at 06:34:55AM +0100, Hiroshi Doyu wrote:
Hi Will,
Will Deacon will.dea...@arm.com wrote @ Mon, 10 Jun 2013 20:34:40 +0200:
The current code only clobbers a local variable, so the device is left
with a stale mapping pointer.
True. This's my bad. Thanks.
That's
Hi Samuel,
if nobody has objections I think this set is ready to get merged. As
Nico mentioned in:
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/173541.html
since we would like to get it merged through the ARM SoC tree owing to
dependencies between this code and ARM power
On 06/10/2013 05:25 PM, Tony Lindgren wrote:
* Quadros, Roger rog...@ti.com [130610 05:37]:
Hi Tony, (sorry, on Outlook web)
- compatible = ti,omap4-padconf, pinctrl-single;
+ compatible = ti,omap4-padconf;
This change is not necessary if we make
On Fri, May 24, 2013 at 6:13 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
To disable spurious interrupts, that get triggered on certain hardware, the
irqpin driver masks them on the parent interrupt controller. To specify
such broken devices a .control_parent parameter can be provided
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag that lets _is_valid_div limit the valid dividers
to these values. _get_maxdiv is also adapted to return even values
for
Third version of basic Rockchip A9 support.
The biggest change is probably the missing pinctrl driver which already found
its way into the pinctrl tree from Linus Walleij as part of the pinconfig
generalisation and should find its way into the mainline kernel from there.
But startup of
In a subsquent patch probe will need to do some handling of data from
the dt match table. So to prevent the need for forward declarations,
move probe and remove below the match table.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
drivers/mmc/host/dw_mmc-pltfm.c | 28
dw_mci_pltfm_remove gets exported and used by dw_mmc-exynos, so should
not be static.
Signed-off-by: Heiko Stuebner he...@sntech.de
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Seungwon Jeon tgih@samsung.com
---
drivers/mmc/host/dw_mmc-pltfm.c |2 +-
1 files changed, 1
Cortex-A9 SoCs from Rockchip use a slightly modified variant of dw_mmc
controllers that seems to require the SDMMC_CMD_USE_HOLD_REG bit to
always be set.
There also seem to be no other modifications (additional register etc)
present, so to keep the footprint low, add this small variant to the
This adds basic support for clocks on Rockchip rk3066 SoCs.
The clock handling thru small dt nodes is heavily inspired by the
sunxi clk code.
The plls are currently read-only, as their setting needs more
investigation. This also results in slow cpu speeds, as the apll starts
at a default of
Uarts on all recent Rockchip SoCs are Synopsis DesignWare 8250 types.
Only their addresses vary very much.
This patch adds the necessary definitions to use any of the uart ports
for early debug purposes.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/Kconfig.debug| 34
On Tue, Jun 11, 2013 at 2:29 PM, Heiko Stübner he...@sntech.de wrote:
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag that lets _is_valid_div limit the valid
Am Dienstag, 11. Juni 2013, 13:51:56 schrieb Andy Shevchenko:
On Tue, Jun 11, 2013 at 2:29 PM, Heiko Stübner he...@sntech.de wrote:
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Hi Sebastian,
On Thu, Jun 06, 2013 at 06:27:08PM +0200, Sebastian Hesselbarth wrote:
This patch set introduces DT-aware irqchip and clocksource drivers for
Marvell Orion SoCs (Kirkwood, Dove, Orion5x, MV78x00) and corresponding
patches for Dove and Kirkwood to enable them for DT-boards.
The
On Tue, Jun 11, 2013 at 3:37 PM, Andy Shevchenko
andy.shevche...@gmail.com wrote:
On Tue, Jun 11, 2013 at 3:06 PM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 11. Juni 2013, 13:51:56 schrieb Andy Shevchenko:
On Tue, Jun 11, 2013 at 2:29 PM, Heiko Stübner he...@sntech.de wrote:
This
On 06/11/13 14:35, Ezequiel Garcia wrote:
On Thu, Jun 06, 2013 at 06:27:08PM +0200, Sebastian Hesselbarth wrote:
This patch set introduces DT-aware irqchip and clocksource drivers for
Marvell Orion SoCs (Kirkwood, Dove, Orion5x, MV78x00) and corresponding
patches for Dove and Kirkwood to enable
On 06/10/2013 06:21 PM, Tony Lindgren wrote:
* Quadros, Roger rog...@ti.com [130610 03:09]:
+
+static int __init pcs_omap_init(void)
+{
+ platform_driver_register(pcs_omap_soc_driver);
+ platform_driver_register(pcs_omap_driver);
+
+ return 0;
+}
On Mon, 27 May 2013 15:23:57 +0200, Michal Simek mon...@monstr.eu wrote:
Hi guys,
we have got a new configurations with iomodule which can be connected to the
microblaze
cpu and I would like to have proper description for this system
+ more advance configuration below.
Buses:
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 14:35, Ezequiel Garcia wrote:
With Thomas Gleixner's Review now only somebody has to take the irqchip
patch then all three drivers are queued for next release.
I can take it through tip if nobody else wants it :)
On Tue, 11 Jun 2013, Thomas Gleixner wrote:
On Thu, 6 Jun 2013, Sebastian Hesselbarth wrote:
This patch adds an irqchip driver for the main interrupt controller found
on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, Discovery Innovation).
Corresponding device tree documentation is also
Hi Arnd,
I have another question!
On Fri, Jun 07, 2013 at 09:01:44PM +0200, Arnd Bergmann wrote:
[...]
+Example:
+
+ soc {
+ compatible = marvell,armada370-mbus, simple-bus;
+ reg = 0xd002 0x100, 0xd0020180 0x20;
+ };
+
+** How does it work?
+
+The
On 06/11/13 15:30, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Thomas Gleixner wrote:
On Thu, 6 Jun 2013, Sebastian Hesselbarth wrote:
This patch adds an irqchip driver for the main interrupt controller found
on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, Discovery Innovation).
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 15:30, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Thomas Gleixner wrote:
On Thu, 6 Jun 2013, Sebastian Hesselbarth wrote:
This patch adds an irqchip driver for the main interrupt controller
found
on Marvell
On Thu, 6 Jun 2013 18:27:09 +0200, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
This patch adds an irqchip driver for the main interrupt controller found
on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, Discovery Innovation).
Corresponding device tree documentation is also
Exynos hdmi IP version is named after hdmi specification version i.e.
1.3 and 1.4. This versioning mechanism is not sufficient to handle
the diversity in the hdmi/phy IPs which are present across the exynos
SoC family.
This patch changes the hdmi version to the name of the SoC in which
the IP was
Add support for exynos5420 hdmi subsystem. It adds compatible strings
for exynos5420 and Changes the drivers as per IP modifications.
This set is based on drm-next branch of Inki Dae's tree at
http://git.kernel.org/cgit/linux/kernel/git/daeinki/drm-exynos.git.
Rahul Sharma (9):
drm/exynos: use
Add support for exynos5420 hdmi IP.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_hdmi.c |4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index a7f7ab3..0c94e54 100644
Add support for exynos5420 hdmiphy which is mapped to the platform
bus. hdmi dt node has a property with name phy which holds the
phandle for hdmiphy node. hdmi driver uses this phandle to check
the compatible type of the phy. If it is compatible with exynos5420,
it needs to be treated as a
Modified code for calculating hdmi IP register values from drm timing
values. The modification is based on the inputs from hw team and specifically
proposed for 1440x576i and 1440x480i. But same changes holds good for other
interlaced resolutions also.
Signed-off-by: Rahul Sharma
Add support for exynos5420 mixer IP in the drm mixer driver.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_mixer.c | 49 +
drivers/gpu/drm/exynos/regs-mixer.h |7 +
2 files changed, 44 insertions(+), 12
Cleanup by removing flags variable from drm_hdmi_dt_parse_pdata
which is not used anywhere. Swtiching to of_get_named_gpio instead
of of_get_named_gpio_flags solved this.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
drivers/gpu/drm/exynos/exynos_hdmi.c |3 +--
1 file changed, 1
Add property to hdmi node to get phandle for hdmiphy node. This
is required to check the compatible type of phy in hdmi driver.
If phy is compatible to exynos5420, it needs to be treated as a
platform device rather than a i2c device.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Update device tree binding documentation for hdmi subsystem with the
clock information, phy property information and compatible strings for
exynos5420.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
.../devicetree/bindings/video/exynos_hdmi.txt | 19 +++
Jason, Arnd:
On Sat, Jun 08, 2013 at 07:45:06PM -0600, Jason Gunthorpe wrote:
[...]
This is the mangling I was referring to. It needs to be the offset
into the target, it can't be something else.
I see both of you have explained this already, but I can't seem
to catch it yet.
Mind
Hi Grant,
nice that you have found a time to look at this.
On 06/11/2013 03:02 PM, Grant Likely wrote:
On Mon, 27 May 2013 15:23:57 +0200, Michal Simek mon...@monstr.eu wrote:
Hi guys,
we have got a new configurations with iomodule which can be connected to the
microblaze
cpu and I would
On 10/06/13 14:41, Srinivas Kandagatla wrote:
On 10/06/13 14:13, Linus Walleij wrote:
On Mon, Jun 10, 2013 at 11:21 AM, Srinivas KANDAGATLA
Isn't it better to pass a struct device_node *np around and have that as
NULL in the non-DT boot path?
I will try it and see how it will look.
I did try
On 06/11/13 15:45, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 15:30, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Thomas Gleixner wrote:
On Thu, 6 Jun 2013, Sebastian Hesselbarth wrote:
This patch adds an irqchip driver for the main interrupt
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 15:45, Thomas Gleixner wrote:
But what about the bit in of that first irq in the cause register? If
it's set on entry you call generic_handle_irq() for that as well. So
if it's set you need to mask it in stat. If not, then it
On 06/11/13 16:13, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 15:45, Thomas Gleixner wrote:
But what about the bit in of that first irq in the cause register? If
it's set on entry you call generic_handle_irq() for that as well. So
if it's set you need
These constants can be used to easily declare MTD partitions inside
DTS.
The constants MTDPART_OFS_* are purposely not included. Indeed,
parse_ofpart_partitions() is expecting u64, but a DT cell is u32.
Negative constants, as defined by MTDPART_OFS_*, would be wrongly
interpreted by
Hello,
Legacy board files use constants from sizes.h and mtd/partitions.h
to declare MTD partitions. This series performs the same with DT.
Necessary headers are added (patch 1), a NAND node is added to
omap3-overo (patch 2), and remaining DTS are converted (patch 3).
Patch 2 was tested on the
Add device-tree node for the on-board NAND memory.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-overo.dtsi | 50
arch/arm/boot/dts/omap3.dtsi |2 +
2 files changed, 52 insertions(+), 0 deletions(-)
diff
Use the MTD constants for NAND and OneNAND nodes used in OMAP3
DTS.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-devkit8000.dts | 10 +-
arch/arm/boot/dts/omap3-igep0020.dts | 10 +-
arch/arm/boot/dts/omap3-igep0030.dts | 10
Some nodes in OMAP3 DTS now use edge or level sensitive interrupts.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3.dtsi |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index
The Tobi expansion boards embeds a SMSC LAN8700 PHY. Add the
corresponding node into the DT. The regulators are not designed
to be turned off.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-tobi.dts | 48 ++
1 files
The LED is active low, not active high.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-tobi.dts |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts
index
Hello,
This series performs several updates to omap3-overo and omap3-tobi.
Patch 1 is necessary to patch 2 for the IRQ constant. The SMSC911X is
largely taken from omap3-igep.
Regards,
Florian
Florian Vaussard (4):
ARM: dts: OMAP3: Include IRQ header
ARM: dts: omap3-tobi: Add SMSC911X node
Commit c971ff1 'leds: leds-pwm: Defer led_pwm_set() if PWM can sleep'
fixed a crash when using a trigger with a pwm-led provided by an
external chip. Now it is safe to add the default trigger according
to board-overo.c.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
Hello,
On 05/31/2013 03:49 PM, Florian Vaussard wrote:
Hello,
Gentle ping. Does someone has any comments on this fix? Can someone
tests on the real hardware?
Nobody has this hardware somewhere in a drawer? :-)
Regards,
Florian
Regards,
Florian
On 05/23/2013 10:11 AM, Florian Vaussard
Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
include/dt-bindings/pinctrl/am33xx.h |5 +
include/dt-bindings/pinctrl/omap.h |5 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git
On Tuesday 11 June 2013 10:31:45 Ezequiel Garcia wrote:
+
+ soc {
+ bootrom {
+ ranges = 0 0x01e0 0xfff0 0x10;
+ };
+ };
I think I'm a bit lost here. Is the soc node in this example the node
that is described as
On Tue, Jun 04, 2013 at 09:14:47AM +0200, Arnaud Ebalard wrote:
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Please merge the patches into one. I don't see the benefit of having three
patches as it is all part of one driver.
Thanks,
Guenter
---
Documentation/hwmon/g762 | 62
On Tue, Jun 04, 2013 at 09:14:29AM +0200, Arnaud Ebalard wrote:
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/hwmon/Kconfig | 10 +
drivers/hwmon/Makefile |1 +
drivers/hwmon/g762.c |
On Tue, Jun 04, 2013 at 11:23:07PM +0200, Simon Guinot wrote:
On Tue, Jun 04, 2013 at 08:52:12AM +0200, Arnaud Ebalard wrote:
Hi Simon,
Simon Guinot simon.gui...@sequanux.org writes:
On Sat, Jun 01, 2013 at 07:26:54PM +0200, Arnaud Ebalard wrote:
Hi Simon and Guenter,
Simon
On Tuesday 11 June 2013 10:57:38 Ezequiel Garcia wrote:
Jason, Arnd:
On Sat, Jun 08, 2013 at 07:45:06PM -0600, Jason Gunthorpe wrote:
[...]
This is the mangling I was referring to. It needs to be the offset
into the target, it can't be something else.
I see both of you have
On Tue, Jun 11, 2013 at 03:13:16PM +0200, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 14:35, Ezequiel Garcia wrote:
With Thomas Gleixner's Review now only somebody has to take the irqchip
patch then all three drivers are queued for next release.
I
On 06/11/2013 04:48 PM, Florian Vaussard wrote:
Use the MTD constants for NAND and OneNAND nodes used in OMAP3
DTS.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-devkit8000.dts | 10 +-
arch/arm/boot/dts/omap3-igep0020.dts | 10
On 06/11/2013 04:49 PM, Florian Vaussard wrote:
The Tobi expansion boards embeds a SMSC LAN8700 PHY. Add the
corresponding node into the DT. The regulators are not designed
to be turned off.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-tobi.dts |
On 06/10/2013 11:30 PM, J Keerthy wrote:
This patch adds Palmas MFD node and the regulator nodes for OMAP5.
The node definitions are based on: https://lkml.org/lkml/2013/6/6/25
Boot tested on omap5-uevm board.
diff --git a/arch/arm/boot/dts/omap5-uevm.dts
On 06/11/2013 08:48 AM, Florian Vaussard wrote:
Use the MTD constants for NAND and OneNAND nodes used in OMAP3
DTS.
I don't quite understand the split between patches 2/3 and 3/3; isn't
the edit to omap3-overo.dtsi (part of) a board file, and hence logically
part of this patch? I'd be tempted
From: Stephen Warren swar...@nvidia.com
Many useful new features have been added to dtc since the last release.
Projects that use dtc wish to test the version number to determine
which features are available. Increment the version number to allow this.
Signed-off-by: Stephen Warren
Hello Stephen,
On 06/11/2013 06:24 PM, Stephen Warren wrote:
On 06/11/2013 08:48 AM, Florian Vaussard wrote:
These constants can be used to easily declare MTD partitions inside
DTS.
The constants MTDPART_OFS_* are purposely not included. Indeed,
parse_ofpart_partitions() is expecting u64, but
Hello Javier,
On 06/11/2013 05:29 PM, Javier Martinez Canillas wrote:
On 06/11/2013 04:48 PM, Florian Vaussard wrote:
Use the MTD constants for NAND and OneNAND nodes used in OMAP3
DTS.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
---
arch/arm/boot/dts/omap3-devkit8000.dts |
Hello,
On 06/11/2013 06:27 PM, Stephen Warren wrote:
On 06/11/2013 08:48 AM, Florian Vaussard wrote:
Use the MTD constants for NAND and OneNAND nodes used in OMAP3
DTS.
I don't quite understand the split between patches 2/3 and 3/3; isn't
the edit to omap3-overo.dtsi (part of) a board file,
Quoting Heiko Stübner (2013-06-11 04:29:32)
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag that lets _is_valid_div limit the valid dividers
to these values.
Am Dienstag, 11. Juni 2013, 20:57:50 schrieb Mike Turquette:
Quoting Heiko Stübner (2013-06-11 04:29:32)
SoCs like the Rockchip Cortex-A9 ones contain divider some clocks
that use the regular mechanisms for storage but allow only even
dividers and 1 to be used.
Therefore add a flag
Quoting Heiko Stübner (2013-06-11 04:31:31)
This adds basic support for clocks on Rockchip rk3066 SoCs.
The clock handling thru small dt nodes is heavily inspired by the
sunxi clk code.
The plls are currently read-only, as their setting needs more
investigation. This also results in slow
On Tue, Jun 11, 2013 at 4:05 PM, Srinivas KANDAGATLA
srinivas.kandaga...@st.com wrote:
Doing this is not adding any value to the driver, because
1. Currently the driver only support DT boot paths, in my previous RFC
patches, Arnd suggested to get rid of the header as all platforms are DT
Quoting Arnd Bergmann (2013-06-04 13:52:03)
On Tuesday 04 June 2013, Linus Walleij wrote:
The whole thing is very different from other DT clock things
I've seen, usually you add a compatible node for each
clock type, and a node for each physical gate. But there
may be several ways to skin
From: Stephen Warren swar...@nvidia.com
Modify the RT5640 driver to parse platform data from device tree. Write
a DT binding document to describe those properties.
Slight re-ordering of rt5640_i2c_probe() to better fit the DT parsing.
Since ldo1_en is optional, guard usage of it with
On Fri, 26 Apr 2013 16:31:24 -0500, Jon Hunter jon-hun...@ti.com wrote:
On 04/26/2013 02:31 AM, Linus Walleij wrote:
On Wed, Apr 17, 2013 at 2:41 AM, Javier Martinez Canillas
martinez.jav...@gmail.com wrote:
So:
+static int omap_gpio_irq_domain_xlate(struct irq_domain *d,
+
On Tue, Jun 11, 2013 at 05:26:47PM +0200, Arnd Bergmann wrote:
That looks ok to me, yes. If you have just one device under some of the nodes
however, I think it's easier use an empty ranges property and do
devbus-bootcs {
ranges;
nor {
On Tue, 11 Jun 2013 17:22:55 +0100, Jonathan Austin jonathan.aus...@arm.com
wrote:
Hi Rob, Thomasz,
(dredging up an oldish thread as I just ran in to this issue)
On 01/04/13 22:19, Rob Herring wrote:
On 03/09/2013 02:15 PM, Tomasz Figa wrote:
This patch moves several for_each macros
On Tue, 11 Jun 2013 16:50:50 +0200, Florian Vaussard florian.vauss...@epfl.ch
wrote:
Pinctrl headers were not protected with #ifndef.
Signed-off-by: Florian Vaussard florian.vauss...@epfl.ch
Obviously this needs to go in via whatever tree added the modified
header files.
Acked-by: Grant
On Tue, 11 Jun 2013 19:41:31 +0530, Rahul Sharma rahul.sha...@samsung.com
wrote:
Update device tree binding documentation for hdmi subsystem with the
clock information, phy property information and compatible strings for
exynos5420.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Document DT properties for the generic pinctrl parameters and add a
parser function.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
.../bindings/pinctrl/pinctrl-bindings.txt | 29 +++
drivers/pinctrl/pinconf-generic.c | 94
Quoting Padmavathi Venna (2013-06-04 05:28:07)
Audio subsystem is introduced in s5pv210 and exynos platforms.
This has seperate clock controller which can control i2s0 and
pcm0 clocks. This patch registers the audio subsystem clocks
with the common clock framework on Exynos family.
Hi Simon,
On Saturday 25 May 2013 10:24:34 Simon Horman wrote:
On Tue, May 21, 2013 at 01:40:04PM +0200, Laurent Pinchart wrote:
Hello,
Here's the second version of the gpio-rcar driver DT bindings. I've tested
the patches on the Marzen board (r8a7779).
Once again I'd appreciate
Hello,
Here's the fifth version of the SuperH and SH Mobile pin controllers (PFC) DT
support patch set.
The patches are based on tags/renesas-next-20130611v2 from Simon's tree
(git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git) and the R-Car
GPIO DT bindings proposal ([RFC/PATCH v2
On 06/11/2013 11:50 PM, Jason Gunthorpe wrote:
On Tue, Jun 11, 2013 at 05:26:47PM +0200, Arnd Bergmann wrote:
That looks ok to me, yes. If you have just one device under some of the nodes
however, I think it's easier use an empty ranges property and do
devbus-bootcs {
On Tue, 11 Jun 2013 16:08:11 +0200, Michal Simek mon...@monstr.eu wrote:
Hi Grant,
nice that you have found a time to look at this.
On 06/11/2013 03:02 PM, Grant Likely wrote:
On Mon, 27 May 2013 15:23:57 +0200, Michal Simek mon...@monstr.eu wrote:
Hi guys,
we have got a new
Platform data isn't used, support can thus be removed.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
Acked-by: Linus Walleij linus.wall...@linaro.org
---
drivers/pinctrl/sh-pfc/core.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
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