On Sat, 2013-06-15 at 20:47 +, Alexey Brodkin wrote:
On 06/16/2013 12:37 AM, Joe Perches wrote:
On Sun, 2013-06-16 at 00:20 +0400, Alexey Brodkin wrote:
[]
+static int arc_emac_rx(struct net_device *ndev, int budget)
[]
+ /* Prepare the BD for next cycle */
+
On Fri, Jun 14, 2013 at 10:24 AM, Christian Ruppert
christian.rupp...@abilis.com wrote:
The comment introduced with the recently added pinctrl_gpio_range.pins
element was wrong. This corrects it.
Thanks to Patrice Chotard for pointing this out.
Signed-off-by: Christian Ruppert
On Fri, Jun 14, 2013 at 5:42 PM, Heiko Stübner he...@sntech.de wrote:
The BIAS_DISABLE and BIAS_HIGH_IMPEDANCE generic pinconfig options were
missing information about their argument - which should be ignored.
Also the BIAS_PULL_* options may have the pull strength as argument
when they are
On Fri, Jun 14, 2013 at 5:42 PM, Heiko Stübner he...@sntech.de wrote:
The bias-pull-* options use values 0 to indicate that the pull should
be activated and optionally also indicate the strength of the pull.
Therefore use an default value of 1 for these options.
Split the low-power-mode
On Fri, Jun 14, 2013 at 5:43 PM, Heiko Stübner he...@sntech.de wrote:
This adds a shortcut when no valid pinconf properties are found
in the parsed dt node, to set the values immediately and return.
Suggested-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
Signed-off-by: Heiko
On Fri, Jun 14, 2013 at 5:43 PM, Heiko Stübner he...@sntech.de wrote:
Allocating the temorary array in pinconf_generic_parse_dt_config on stack
might cause problems later on, when the number of options grows over time.
Therefore also allocate this array dynamically to be on the safe side.
On Fri, Jun 14, 2013 at 5:44 PM, Heiko Stübner he...@sntech.de wrote:
Change the rockchip pinctrl driver to handle the arguments of 0 or 1 to
the pull pinconfig options correctly, so that the pull gets disabled when
either the bias_disable options is set or the pull option has the argument 0.
Am Sonntag, 16. Juni 2013, 12:26:38 schrieb Linus Walleij:
On Fri, Jun 14, 2013 at 5:42 PM, Heiko Stübner he...@sntech.de wrote:
The BIAS_DISABLE and BIAS_HIGH_IMPEDANCE generic pinconfig options were
missing information about their argument - which should be ignored.
Also the
Am Sonntag, 16. Juni 2013, 12:35:43 schrieb Linus Walleij:
On Fri, Jun 14, 2013 at 5:44 PM, Heiko Stübner he...@sntech.de wrote:
Change the rockchip pinctrl driver to handle the arguments of 0 or 1 to
the pull pinconfig options correctly, so that the pull gets disabled when
either the
On Tue, Jun 11, 2013 at 9:27 AM, Christian Ruppert
christian.rupp...@abilis.com wrote:
On Fri, Jun 07, 2013 at 01:18:35PM -0600, Stephen Warren wrote:
However, then the correlation between these pretend pins (i.e. really
the groups) and GPIOs won't work, because each pin is really 4 pins,
and
On Mon, Jun 10, 2013 at 11:22 AM, Srinivas KANDAGATLA
srinivas.kandaga...@st.com wrote:
About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.
OK that's
On Sun, Jun 16, 2013 at 12:45 PM, Heiko Stübner he...@sntech.de wrote:
Am Sonntag, 16. Juni 2013, 12:26:38 schrieb Linus Walleij:
Can't we rely on PIN_CONFIG_BIAS_DISABLE for all this?
you're the boss on this, I'll do whatever you say :-)
Oh that's not good. As can be seen from past
On Sun, Jun 16, 2013 at 1:02 PM, Heiko Stübner he...@sntech.de wrote:
- *config = 0;
+ pull = rockchip_get_pull(bank, pin - bank-pin_base);
+ *config = (pull == param) ? 1 : 0;
And then I guess you should emit PIN_CONFIG_BIAS_DISABLE
here as
On Thu, Jun 13, 2013 at 10:59 PM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This change makes documentation of the the gpio-ranges property shorter
and more succinct, more consistent with the style of the rest of the
document, and not mention
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
arch/arm/mach-imx/mach-pca100.c | 7 +--
arch/arm/mach-imx/mach-pcm043.c | 7 +--
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c
index b8b15bb..68badf8
This patch copies some parts from imx-ssi to support AC97 on
imx27-pca100 and imx35-pcm043. This is a implementation of the
ac97-slave mode.
For ac97, the registers have to be setup earlier than for other ssi
modes because there is some communication with the external device
before actual
This patch removes the NO_DT flag. The pdev pointer may have a proper
of_node with the dmas property, so we can use it to request DMA
channels.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
Notes:
Changes in v6:
- After rebasing onto Shawn's imx-pcm cleanups, this patch just
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
sound/soc/fsl/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
index dafffd1..368686e 100644
--- a/sound/soc/fsl/Kconfig
+++ b/sound/soc/fsl/Kconfig
@@ -149,7 +149,8
fsl-ssi was located in powerpc/fsl/ssi.txt. This is no powerpc specific
device, so it should be moved to sound/ as it connects to differen audio
codecs.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
.../devicetree/bindings/{powerpc/fsl/ssi.txt = sound/fsl,ssi.txt}| 0
1 file
Hi,
This series adds DT support for phycore-ac97. Beside ac97 support, the series
adds imx-pcm-fiq and generic DMA bindings to fsl-ssi.
In version 8 I fixed the build issues by seperating the DT capable ac97 phycore
driver from the old driver.
Regards,
Markus
Changes in v8:
- Fix build
Cleaner parameter passing for imx-pcm-fiq. Create a seperated fiq-params
struct to pass all arguments.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
Notes:
Changes in v7:
- Fix init function signature for !CONFIG_SND_SOC_IMX_PCM_FIQ
Changes in v6:
- After rebasing
There may be some platforms using fsl-ssi that do not have a DMA driver
with generic DMA bindings. So this patch adds support for the generic
DMA bindings, while still accepting the old fsl,dma-events property if
dmas is not found.
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
Notes:
Add support for non-dma pcm for imx platforms with imx-pcm-fiq support.
Instead of imx-pcm-audio, in this case imx-pcm-fiq-audio device is added
and the SIER flags are set differently.
We need imx-pcm-fiq for some boards that use an incompatible codec.
imx-pcm-fiq handles those codecs differently
fsl_ssi and imx-ssi can be both enabled at the same time. To be able to
add AC97 support to fsl_ssi, soc_ac97_ops have to be available to both
drivers.
fsl_ssi has DT support and should be the only driver at some point in
the future. This patch moves the definition of soc_ac97_ops to fsl_ssi.
Update the fsl-ssi bindings. DMA is no required property anymore and
uses the generic DMA bindings. imx-fiq is a new alternative to DMA
Signed-off-by: Markus Pargmann m...@pengutronix.de
---
Notes:
Changes in v4:
- Add a comment about hardware bugs for imx-pcm-fiq
Changes in
Add devicetree support for phycore-ac97 driver in a seperated driver for
DT loading. The seperation reduces the confusion with the old style
initialization of this driver via late_initcall. Also this driver is
using fsl-ssi instead of imx-ssi.
platform_of_node and cpu_of_node are set according to
Change the rockchip pinctrl driver to handle the arguments to the pull
pinconfig options correctly. So only accept non-0 values for the
pull options as the rockchip pin-controller can only turn pulls on and
off (this via BIAS_DISABLE).
Signed-off-by: Heiko Stuebner he...@sntech.de
---
changes
On Sun, Jun 9, 2013 at 12:55 PM, Linus Walleij linus.wall...@linaro.org wrote:
The Nomadik clock implementation was a stub just using
fixed clocks.
This implements the clocks properly instead of relying
on them all being on at boot and leaving them all on.
Mike, ping on this.
There was
On 06/15/13 02:45, Sylwester Nawrocki wrote:
Generic PHY drivers are used to handle the MIPI CSIS and MIPI DSIM
DPHYs so we can remove now unused code at arch/arm/plat-samsung.
If so, sounds good :)
In case there is any board file for S5PV210 platforms using MIPI
CSIS/DSIM (not any upstream
Hi Sylwester,
Looks good, but I added some nitpicks inline.
On Friday 14 of June 2013 19:45:47 Sylwester Nawrocki wrote:
Add a PHY provider driver for the Samsung S5P/Exynos SoC MIPI CSI-2
receiver and MIPI DSI transmitter DPHYs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
On Friday 14 of June 2013 19:45:48 Sylwester Nawrocki wrote:
Add PHY provider node for the MIPI CSIS and MIPI DSIM PHYs.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 12
On Friday 14 of June 2013 19:45:49 Sylwester Nawrocki wrote:
Use the generic PHY API instead of the platform callback to control
the MIPI DSIM DPHY.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
On Sun, Jun 16, 2013 at 12:36:20AM +0200, Arnaud Ebalard wrote:
GMT G762/763 fan speed PWM controller is connected directly to a fan
and performs closed-loop or open-loop control of the fan speed. Two
modes - PWM or DC - are supported by the chip. Introduced driver
provides various knobs to
On Sat, Jun 15, 2013 at 01:31:08PM +0200, Laurent Pinchart wrote:
Hi Olof,
On Friday 14 June 2013 17:47:51 Olof Johansson wrote:
On Thu, Jun 13, 2013 at 04:00:26PM +0900, Simon Horman wrote:
From: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
Add DT bindings for the
Thanks Seung-Woo,
On Fri, Jun 14, 2013 at 12:23 PM, 김승우 sw0312@samsung.com wrote:
Hello Rahul,
On 2013년 06월 11일 23:11, Rahul Sharma wrote:
Exynos hdmi IP version is named after hdmi specification version i.e.
1.3 and 1.4. This versioning mechanism is not sufficient to handle
the
On Sun, Jun 16, 2013 at 03:25:06PM +0200, Markus Pargmann wrote:
Markus Pargmann (11):
ASoC: imx-pcm-dma: DT support
ASoC: imx-pcm-fiq: Introduce pcm-fiq-params
ASoC: fsl: Move soc_ac97_ops from imx-ssi to fsl_ssi
ASoC: fsl-ssi: Add support for imx-pcm-fiq
ASoC:
Applied.
Thanks,
Inki Dae
2013/6/14 김승우 sw0312@samsung.com
Hello Rahul,
this patch is not related with others and it looks good to me.
On 2013년 06월 11일 23:11, Rahul Sharma wrote:
Cleanup by removing flags variable from drm_hdmi_dt_parse_pdata
which is not used anywhere. Swtiching
The forthcoming Device Tree binding for the divider clock type will use
a bitfield mask instead of bitfield width, which is what the current
basic divider implementation uses.
This patch replaces the u8 width in struct clk_divider with a u32 mask.
The divider code is updated to use the bit mask
This series introduces binding definitions for common register-mapped
clock multiplexer, divider and gate IP blocks along with the
corresponding setup functions for matching DT data. The bindings are
similar to the struct definitions but please don't hold that against the
binding: the struct
Walks the clocks array of parent clock phandles and returns the
number.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
No change since v1
drivers/clk/clk.c| 6 ++
include/linux/clk-provider.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/clk/clk.c
Device Tree binding for the basic clock multiplexer, plus the setup
function to register the clock. Based on the existing fixed-clock
binding.
Includes minor beautification of clk-provider.h where some whitespace is
added and of_fixed_factor_clock_setup is relocated to maintain a
consistent
Device Tree binding for the basic clock gate, plus the setup function to
register the clock. Based on the existing fixed-clock binding.
A different approach to this was proposed in 2012[1] and a similar
binding was proposed more recently[2] if anyone wants some extra
reading.
[1]
Devicetree binding for the basic clock divider, plus the setup function
to register the clock. Based on the existing fixed-clock binding.
Signed-off-by: Mike Turquette mturque...@linaro.org
---
Changes since v1:
* mask is u32, shift is u8
* use bit mask instead of bitfield width
* DT property
Hi Heiko,
On Friday 14 June 2013 16:53:06 James Hogan wrote:
On 14/06/13 16:41, Heiko Stübner wrote:
Some issues with the recently submitted generic pinconfig parsing from dt
came up, so fix these in this follow-up series.
Hopefully I did catch all of them.
Tested on my rk3066
Hi Linus,
Would you be able to review this patch in the near future ? I'd like to push
the series to v3.11.
On Friday 14 June 2013 01:45:47 Laurent Pinchart wrote:
Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.
On 06/14/2013 10:10 PM, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe
On 06/11/2013 12:23 AM, Tomasz Figa wrote:
On Monday 10 of June 2013 09:13:11 Tushar Behera wrote:
On 06/08/2013 05:20 PM, Tomasz Figa wrote:
On Thursday 06 of June 2013 16:52:28 Tushar Behera wrote:
[ ... ]
MUX_A(mout_core, mout_core, mout_core_p4210,
- SRC_CPU, 16, 1,
Hi Mike,
On Thu, Jun 13, 2013 at 8:32 AM, Padma Venkat padma@gmail.com wrote:
Hi Mike,
On Wed, Jun 12, 2013 at 10:15 PM, Mike Turquette mturque...@linaro.org
wrote:
Quoting Padmavathi Venna (2013-06-12 01:07:43)
This patch adds enum entries for div_i2s1 and div_i2s2 which are
required
On 06/06/2013 06:23 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 12:13 Mon 03 Jun , Michal Simek wrote:
Hi,
Arnd can you take look on it again please
I'll take a look on it next week
Any update on this?
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP - KeyID: FE3D1F91
w:
Hi Linus,
can you please look at this?
Thanks,
Michal
On 06/03/2013 02:31 PM, Michal Simek wrote:
Simplification is done by using OF helper function
which increase readability of code and remove
(if (var) var = be32_to_cpup;) assignment.
Signed-off-by: Michal Simek
On Fri, May 31, 2013 at 9:34 AM, Michal Simek mon...@monstr.eu wrote:
On 05/31/2013 09:14 AM, Linus Walleij wrote:
It's OK, but fix the boolean member so as to just needing to
be present:
xlnx,is-dual;
Rather than
xlnx,is-dual = 1;
Surely I can do it but it means to change our BSP and
On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:
Simplification is done by using OF helper function
which increase readability of code and remove
(if (var) var = be32_to_cpup;) assignment.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
-
On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:
Supporting the second channel in the driver.
Offset is 0x8 and both channnels share the same
IRQ.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Use kernel doc format - suggested by
On Mon, Jun 3, 2013 at 2:31 PM, Michal Simek michal.si...@xilinx.com wrote:
Describe gpio-xilinx binding.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Changes in v2:
- Extend description
Thanks, patch applied but look into this:
+Optional properties:
+- interrupts : Interrupt
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