Thanks for looking at this again.
I will be away from my office until the middle of July, so I will not be
able to generate and test a revised patch until then.
David Daney
On 06/24/2013 03:06 PM, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 8:10 PM, David Daney ddaney.c...@gmail.com
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect to this message...
On 06/17/2013 01:51 AM, Linus Walleij wrote:
On Sat, Jun 15, 2013 at 1:18 AM, David Daney ddaney.c...@gmail.com wrote:
From: David Daney david.da...@cavium.com
The SOCs
On 06/20/2013 11:18 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:10 -0700, David Daney wrote:
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect to this message...
[]
On 06/17/2013 01:51 AM, Linus Walleij wrote:
+static int octeon_gpio_get
On 06/20/2013 11:43 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:27 -0700, David Daney wrote:
On 06/20/2013 11:18 AM, Joe Perches wrote:
On Thu, 2013-06-20 at 11:10 -0700, David Daney wrote:
Sorry for not responding earlier, but my e-mail system seems to have
malfunctioned with respect
From: David Daney david.da...@cavium.com
The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip
GPIO pins, this driver handles them all. Configuring the pins as
interrupt sources is handled elsewhere (OCTEON's irq handling code).
Signed-off-by: David Daney david.da...@cavium.com
On 01/31/2013 05:20 AM, John Crispin wrote:
Signed-off-by: John Crispin blo...@openwrt.org
Acked-by: David Daney david.da...@cavium.com
---
Documentation/devicetree/bindings/mips/cpu_irq.txt | 47
1 file changed, 47 insertions(+)
create mode 100644 Documentation
-init proposal.
David Daney
g.
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devicetree
\*.dts\*` to a top level dts/ directory.
David Daney
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On 09/17/2012 12:49 AM, Ivo Sieben wrote:
Hi,
2012/8/22 David Daney ddaney.c...@gmail.com:
From: David Daney david.da...@cavium.com
/*-*/
+static const struct spi_device_id at25_id[] = {
+ {at25, 0
Grant or Rob giving an Acked-by.
David Daney.
to my char-misc git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
in the char-misc-next branch.
The patch will show up in the next release of the linux-next tree
(usually sometime within the next 24
On 09/05/2012 04:34 PM, Greg KH wrote:
On Wed, Sep 05, 2012 at 02:33:58PM -0700, David Daney wrote:
On 09/05/2012 02:10 PM, gre...@linuxfoundation.org wrote:
This is a note to let you know that I've just added the patch titled
misc/at25, dt: Improve at25 SPI eeprom device tree bindings
*/
inta = 5;
};
};
We would then modify of_mdio.c so that when it encountered an
ethernet-phy-nexus, it would add all the children of the nexus.
Comments? Objections?
Thanks, and let me know what you think,
David Daney
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From: David Daney david.da...@cavium.com
A couple of patches that make using SPI EEPROMs Real Easy for me.
David Daney (2):
misc/at25, dt: Improve at25 SPI eeprom device tree bindings.
misc/at25: Add an .id_table to at25 to facilitate driver loading and
binding.
Documentation
From: David Daney david.da...@cavium.com
With this patch we get automatic driver loading and binding for device
tree specified hardware typologies. Also recognize st,m95256
devices as being compatible with the driver.
Signed-off-by: David Daney david.da...@cavium.com
---
drivers/misc/eeprom
need a shift too?
David Daney
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On 08/22/2012 03:38 PM, Timur Tabi wrote:
David Daney wrote:
I wonder if *fpga is really a good name for this. It is a general
purpose multiplexer with a memory mapped control register. I would call
it something like mdio-mux-mmioreg.
At one point, I thought of using mdio-mux-bitbang
On 05/19/2012 10:46 PM, Grant Likely wrote:
On Fri, 11 May 2012 14:34:46 -0700, David Daney ddaney.c...@gmail.com wrote:
From: David Daney david.da...@cavium.com
Add the driver, link it into the kbuild system and provide device tree
binding documentation.
Signed-off-by: David Daney david.da
On 08/21/2012 12:49 PM, Guenter Roeck wrote:
On Fri, May 11, 2012 at 08:34:46PM -, David Daney wrote:
From: David Daney david.da...@cavium.com
Add the driver, link it into the kbuild system and provide device tree
binding documentation.
Signed-off-by: David Daney david.da...@cavium.com
;
Although this will get the job done, I don't think it is the cleanest
approach.
Would it be better to create a new iterator
(for_each_available_child_of_node perhaps) that skips the unavailable
nodes? This seems like a general problem that is not restricted to mdio
multiplexers.
David
From: David Daney david.da...@cavium.com
Define two new compatible values for Ethernet
PHYs. ethernet-phy-ieee802.3-c22 and ethernet-phy-ieee802.3-c45
are used to indicate a PHY uses the corresponding protocol.
If a PHY is compatible with ethernet-phy-ieee802.3-c45, we
indicate this so
From: David Daney david.da...@cavium.com
Allow PHY drivers to supply their own device matching function
(match_phy_device()), or to be matched OF compatible properties.
PHYs following IEEE802.3 clause 45 have more than one device
identifier constants, which breaks the default device matching
From: David Daney david.da...@cavium.com
The only non-cosmetic change from v1 is to pass an additional argument
to get_phy_device() that indicates that the PHY uses 802.3 clause 45
signaling, previously I had been using a high order bit of the addr
parameter for this.
There are also changes from
From: David Daney david.da...@cavium.com
The IEEE802.3 clause 45 MDIO bus protocol allows for directly
addressing PHY registers using a 21 bit address, and is used by many
10G Ethernet PHYS. Already existing is the ability of MDIO bus
drivers to use clause 45, with the MII_ADDR_C45 flag. Here
From: David Daney david.da...@cavium.com
Add a driver for BCM8706 and BCM8727 devices. These are a 10Gig PHYs
which use MII_ADDR_C45 addressing. They are always 10G full duplex, so
there is no autonegotiation. All we do is report link state and send
interrupts when it changes.
If the PHY has
the correct kerneldoc
format to do so.
OK.
David Daney
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of multiplexing the
arguments into a single int.
Therefore, I am going to propose that we add a 'flags' parameter to
get_phy_device() and change the (two) callers.
Does that seem better (or at least acceptable)?
Or do you really want to pass the address of a (one bit) structure instead?
David Daney
From: David Daney david.da...@cavium.com
The existing PHY driver infrastructure supports IEEE 802.3 Clause 22
PHYs used with 10/100/1000MB Ethernet. For 10G Ethernet, many PHYs
use 802.3 Clause 45. These patches attempt to add core support for
this as well as a driver for BCM87XX 10G PHY
From: David Daney david.da...@cavium.com
Define two new compatible values for Ethernet
PHYs. ethernet-phy-ieee802.3-c22 and ethernet-phy-ieee802.3-c45
are used to indicate a PHY uses the corresponding protocol.
If a PHY is compatible with ethernet-phy-ieee802.3-c45, we
indicate this so
From: David Daney david.da...@cavium.com
Allow PHY drivers to supply their own device matching function
(match_phy_device()), or to be matched OF compatible properties.
PHYs following IEEE802.3 clause 45 have more than one device
identifier constants, which breaks the default device matching
From: David Daney david.da...@cavium.com
The IEEE802.3 clause 45 MDIO bus protocol allows for directly
addressing PHY registers using a 21 bit address, and is used by many
10G Ethernet PHYS. Already existing is the ability of MDIO bus
drivers to use clause 45, with the MII_ADDR_C45 flag. Here
From: David Daney david.da...@cavium.com
libfdt is part of the device tree support in scripts/dtc/libfdt. For
some platforms that use the Device Tree, we want to be able to edit
the flattened device tree form.
We don't want to burden kernel builds that do not require it, so we
gate compilation
From: David Daney david.da...@cavium.com
If a compiled in device tree template is used, trim out unwanted parts
based on legacy platform probing.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/Kconfig |2 +
arch/mips/cavium-octeon/Makefile
From: David Daney david.da...@cavium.com
Create two domains. One for the GPIO lines, and the other for on-chip
sources.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/cavium-octeon/octeon-irq.c | 215 --
1 files changed, 206 insertions(+), 9
From: David Daney david.da...@cavium.com
The two device tree files octeon_3xxx.dts and octeon_68xx.dts are
trimmed by code in a subsequent patch to reflect the hardware actually
present on the board. To this end several properties that are not
part of the declared bindings are added to aid
From: David Daney david.da...@cavium.com
Get the MDIO bus controller addresses from the device tree, small
clean up in use of devm_*
Remove, now unused, platform device setup code.
Acked-by: David S. Miller da...@davemloft.net
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips
From: David Daney david.da...@cavium.com
There are three parts to this:
1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2.
The interrupts are specified by the device tree and these hard
coded irq numbers block the used of the irq lines by the irq_domain
code.
2) Remove
From: David Daney david.da...@cavium.com
This patch set depends on the previous set to add Device Tree to
OCTEON. That set can be found among other places here:
http://www.linux-mips.org/archives/linux-mips/2012-06/msg00081.html
For v3:
No functional changes, Added more Acked-bys, rebased
From: David Daney david.da...@cavium.com
Get MAC address and PHY connection from the device tree. The driver
is converted to a platform driver.
Signed-off-by: David Daney david.da...@cavium.com
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/staging/octeon/ethernet-mdio.c | 28
From: David Daney david.da...@cavium.com
The device tree will supply the register bank base addresses, make
register addressing relative to those. PHY connection is now
described by the device tree.
The OCTEON_IRQ_MII{0,1} symbols are also removed as they are now
unused and interfere
From: David Daney david.da...@cavium.com
Switch to using the device tree to register serial ports.
Add all the ports with compatible = cavium,octeon-3860-uart. Octeon serial
ports have their own device type, required port flags, and I/O
functions, so using of_serial.c is not indicated.
We need
From: David Daney david.da...@cavium.com
Allow PHY drivers to supply their own device matching function
(match_phy_device()), or to be matched OF compatible properties.
PHYs following IEEE802.3 clause 45 have more than one device
identifier constants, which breaks the default device matching
From: David Daney david.da...@cavium.com
Define two new compatible values for Ethernet
PHYs. ethernet-phy-ieee802.3-c22 and ethernet-phy-ieee802.3-c45
are used to indicate a PHY uses the corresponding protocol.
If a PHY is compatible with ethernet-phy-ieee802.3-c45, we
indicate this so
From: David Daney david.da...@cavium.com
The existing PHY driver infrastructure supports IEEE 802.3 Clause 22
PHYs used with 10/100/1000MB Ethernet. For 10G Ethernet, many PHYs
use 802.3 Clause 45. These patches attempt to add core support for
this as well as drivers for several different 10G
From: David Daney david.da...@cavium.com
Add a driver for BCM8706 and BCM8727 devices. These are a 10Gig PHYs
which use MII_ADDR_C45 addressing. They are always 10G full duplex, so
there is no autonegotiation. All we do is report link state and send
interrupts when it changes.
If the PHY has
From: David Daney david.da...@cavium.com
The IEEE802.3 clause 45 MDIO bus protocol allows for directly
addressing PHY registers using a 21 bit address, and is used by many
10G Ethernet PHYS. Already existing is the ability of MDIO bus
drivers to use clause 45, with the MII_ADDR_C45 flag. Here
On 05/22/2012 11:50 AM, Ben Hutchings wrote:
On Tue, May 22, 2012 at 10:59:52AM -0700, David Daney wrote:
[...]
--- /dev/null
+++ b/drivers/net/phy/cs4321-ucode.h
@@ -0,0 +1,4378 @@
+/*
+ *Copyright (C) 2011 by Cortina Systems, Inc.
+ *
+ *This program is free software; you can
On 05/19/2012 11:08 PM, Grant Likely wrote:
On Sat, 19 May 2012 23:54:36 -0600, Grant Likelygrant.lik...@secretlab.ca
wrote:
On Fri, 11 May 2012 15:05:21 -0700, David Daneyddaney.c...@gmail.com wrote:
From: David Daneydavid.da...@cavium.com
When generating MODALIASes, it is convenient to
.
A sane person would implement a separate MDIO STA controller for each
bus, in which case you wouldn't use the multiplexer driver.
Only people dealing with insane hardware need the multiplexer. The
patch in net-next has a nice ASCII art picture of such an insane design.
David Daney
ebb6600.dts
On 05/18/2012 03:09 PM, Timur Tabi wrote:
David Daney wrote:
I'm not sure what the parent MDIO bus node is supposed to represent.
Is that that device that actually controls the muxing hardware
No. It is the device that implements the master 802.3 clause {22,45}
MDIO Station Management
to be a
problem.
David Daney
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From: David Daney david.da...@cavium.com
Several members of the OCTEON family have on-chips SPI master
controller hardware, so here is a driver for it.
I split the register definitions out to a separate patch so that they
live with all the other similar files for other OCTEON hardware blocks
From: David Daney david.da...@cavium.com
Needed by SPI driver.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/include/asm/octeon/cvmx-mpi-defs.h | 328 ++
1 files changed, 328 insertions(+), 0 deletions(-)
create mode 100644 arch/mips/include/asm
From: David Daney david.da...@cavium.com
As per the Subject, given a device tree fragment like this:
spi@107001000 {
compatible = cavium,octeon-3010-spi;
reg = 0x10700 0x1000 0x0 0x100;
interrupts = 0 58;
#address
From: David Daney david.da...@cavium.com
For SPI devices, the MODALIAS should start with spi: so that the
modprobe can find the proper drivers.
Be consistent, for devices added via spi_new_device(), make sure
spi: is added if it is not already there. In spi_match_device()
handle matching when
From: David Daney david.da...@cavium.com
We can extract the pagesize, size and address-width from the
device tree so that SPI eeproms can be fully specified in the device
tree.
Also add a MODULE_DEVICE_TABLE so the drivers can be automatically bound.
Signed-off-by: David Daney david.da
From: David Daney david.da...@cavium.com
When generating MODALIASes, it is convenient to add things like spi:
or i2c: to the front of the strings. This allows the standard
modprobe to find the right driver when automatically populating bus
children from the device tree structure.
Add a prefix
From: David Daney david.da...@cavium.com
The OCTEON MMC controller is currently found on cn61XX and cnf71XX
devices. Device parameters are configured from device tree data.
Currenly supported are eMMC, MMC and SD devices.
Signed-off-by: David Daney david.da...@cavium.com
---
This patch
On 05/03/2012 05:30 PM, Bjorn Helgaas wrote:
On Tue, May 1, 2012 at 7:28 AM, John Crispinblo...@openwrt.org wrote:
On 30/04/12 19:54, David Daney wrote:
On 04/30/2012 10:46 AM, John Crispin wrote:
On MIPS we want to call of_irq_map_pci from inside
arch/mips/include/asm/pci.h:extern int
From: David Daney david.da...@cavium.com
This code has been working well for about six months on a couple of
different configurations (boards), so I thought it would be a good
time to send it out again, and I hope get it on the path towards
merging.
v6: Correct Kconfig depends in 2/3 as noticed
From: David Daney david.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register() function is modified so that the device
From: David Daney david.da...@cavium.com
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient
From: David Daney david.da...@cavium.com
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney david.da...@cavium.com
---
.../devicetree/bindings/net/mdio-mux-gpio.txt | 127
this consistent
tree-wide, but it is not yet applied.
David Daney
Signed-off-by: John Crispinblo...@openwrt.org
Cc: linux-...@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-m...@linux-mips.org
---
I am not sure which tree this should go via. Grant, can you take it ?
drivers
From: David Daney david.da...@cavium.com
This code is not common enough to be in a shared file, so OCTEON defines
it's own versions.
When the last of this target specific code is moved out, we can remove
all of this.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/kernel/prom.c
From: David Daney david.da...@cavium.com
This code has now had extensive testing, it is running on more
than 10 different boards and SOC combinations.
The patches in this set are all in the arch/mips tree and should
probably be merged by Ralf.
They do depend on this libfdt patch:
https
From: David Daney david.da...@cavium.com
Create two domains. One for the GPIO lines, and the other for on-chip
sources.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/cavium-octeon/octeon-irq.c | 215 --
1 files changed, 206 insertions(+), 9
From: David Daney david.da...@cavium.com
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/Kconfig |2 +
arch/mips/cavium-octeon/Makefile |3 +
arch/mips/cavium-octeon/octeon-platform.c | 523 -
arch/mips/cavium
From: David Daney david.da...@cavium.com
The two device tree files octeon_3xxx.dts and octeon_68xx.dts are
trimmed by code in a subsequent patch to reflect the hardware actually
present on the board. To this end several properties that are not
part of the declared bindings are added to aid
From: David Daney david.da...@cavium.com
Get the MDIO bus controller addresses from the device tree, small
clean up in use of devm_*
Remove, now unused, platform device setup code.
Acked-by: David S. Miller da...@davemloft.net
Signed-off-by: David Daney david.da...@cavium.com
Cc: net
From: David Daney david.da...@cavium.com
This patch set depends on the previous set to add Device Tree to
OCTEON. That set can be found among other places here:
http://marc.info/?l=linux-kernelm=133548781607480
For v2:
No functional changes, but minor clean-ups to use some new device tree
From: David Daney david.da...@cavium.com
There are three parts to this:
1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2.
The interrupts are specified by the device tree and these hard
coded irq numbers block the used of the irq lines by the irq_domain
code.
2) Remove
From: David Daney david.da...@cavium.com
Switch to using the device tree to register serial ports.
Add all the ports with compatible = cavium,octeon-3860-uart. Octeon serial
ports have their own device type, required port flags, and I/O
functions, so using of_serial.c is not indicated.
We need
From: David Daney david.da...@cavium.com
Get MAC address and PHY connection from the device tree. The driver
is converted to a platform driver.
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org
Signed-off-by: David Daney david.da...@cavium.com
Cc: net...@vger.kernel.org
Cc: Greg Kroah
appropriate
dependencies.
I will send a revised patch set.
Thanks,
David Daney
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On 04/22/2012 09:20 AM, Wolfram Sang wrote:
On Thu, Apr 12, 2012 at 02:14:23PM -0700, David Daney wrote:
From: David Daneydavid.da...@cavium.com
For 'normal' i2c bus drivers, we can call of_i2c_register_devices()
and have the device tree framework automatically populate the bus
On 04/23/2012 09:58 AM, Wolfram Sang wrote:
I can send a new patch set with those corrections, or if you prefer,
you could commit these making the changes yourself.
I'll do it, probably faster for both of us :)
Great!
Thank you for reviewing this,
David Daney
parameters required for DT support. Update all callers.
** Set the appropriate adap-dev.of_node for the child bus.
** Call of_i2c_register_devices() for the child bus.
Signed-off-by: Stephen Warrenswar...@nvidia.com
David Daney (CCed) posted another variant [1]. Just looking at the
patches
it here too.
David Daney
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the legacy one?
Yes, they are documented here:
http://patchwork.linux-mips.org/patch/3536/
look in the cavium-i2c.txt file.
Thanks,
David Daney
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) Regenerate the entire set with said patch rolled in?
Thanks,
David Daney
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From: David Daney david.da...@cavium.com
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney david.da...@cavium.com
---
.../devicetree/bindings/net/mdio-mux-gpio.txt | 127
From: David Daney david.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register() function is modified so that the device
From: David Daney david.da...@cavium.com
This code has been working well for about six months on a couple of
different configurations (boards), so I thought it would be a good
time to send it out again, and I hope get it on the path towards
merging.
v5: Correct Kconfig depends in 3/3 as noticed
From: David Daney david.da...@cavium.com
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient
On 04/16/2012 06:03 PM, David Daney wrote:
From: David Daneydavid.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register
From: David Daney david.da...@cavium.com
This code has been working well for about six months on a couple of
different configurations (boards), so I thought it would be a good
time to send it out again, and I hope get it on the path towards
merging.
v4: Correct some comment text and rename
From: David Daney david.da...@cavium.com
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney david.da...@cavium.com
---
.../devicetree/bindings/net/mdio-mux-gpio.txt | 127
From: David Daney david.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register() function is modified so that the device
From: David Daney david.da...@cavium.com
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient
From: David Daney david.da...@cavium.com
This code has been working well for about six months on a couple of
different configurations (boards), so I thought it would be a good
time to send it out again, and I hope get it on the path towards
merging.
v3: Update binding to use mdio-mux-gpio
From: David Daney david.da...@cavium.com
Add of_mdio_find_bus() which allows an mii_bus to be located given its
associated the device tree node.
This is needed by the follow-on patch to add a driver for MDIO bus
multiplexers.
The of_mdiobus_register() function is modified so that the device
From: David Daney david.da...@cavium.com
This patch adds a somewhat generic framework for MDIO bus
multiplexers. It is modeled on the I2C multiplexer.
The multiplexer is needed if there are multiple PHYs with the same
address connected to the same MDIO bus adepter, or if there is
insufficient
From: David Daney david.da...@cavium.com
The GPIO pins select which sub bus is connected to the master.
Initially tested with an sn74cbtlv3253 switch device wired into the
MDIO bus.
Signed-off-by: David Daney david.da...@cavium.com
---
.../devicetree/bindings/net/mdio-mux-gpio.txt | 127
On 04/13/2012 02:56 AM, Florian Fainelli wrote:
Hi David,
[...]
+/*
+ * The address offset of the GPIO configuration register for a given
+ * line.
+ */
+static unsigned int bit_cfg_reg(unsigned int gpio)
+{
+ if (gpio 16)
+ return 8 * gpio;
+ else
+ return 8 * (gpio - 16) + 0x100;
+}
You
Pinging on this, again, as we'd like to leverage it for current and
future boards. :)
Today I am working on it, so I will have new patches within a couple of
days.
David Daney
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From: David Daney david.da...@cavium.com
v3: Integrate changes from Lars-Peter Clausen to make better use of
the of_*() infrastructure. Get rid of ugly #ifdefs.
v2: Update bindings to use reg insutead of cell-index
v1: Unchanged from the original RFC where I said:
We need to populate
From: David Daney david.da...@cavium.com
For 'normal' i2c bus drivers, we can call of_i2c_register_devices()
and have the device tree framework automatically populate the bus with
the devices specified in the device tree.
This patch adds a common code to the i2c mux framework to have the mux
sub
From: David Daney david.da...@cavium.com
And adjust all callers.
The new device parameter is used in the next patch to initialize the
mux's of_node so that its children may be automatically populated.
Signed-off-by: David Daney david.da...@cavium.com
Cc: Lars-Peter Clausen l...@metafoo.de
From: David Daney david.da...@cavium.com
... and create asm/mach-cavium-octeon/gpio.h so that things continue
to build.
This allows us to use the existing I2C connected GPIO expanders.
Signed-off-by: David Daney david.da...@cavium.com
---
arch/mips/Kconfig |1
From: David Daney david.da...@cavium.com
There are two patches needed to add OCTEON GPIO support:
1) Select ARCH_REQUIRE_GPIOLIB. This allows standard I2C GPIO
expanders to function, as well as being a prerequisite for the driver
for the on-chip pins.
2) The on-chip pin driver.
I'm not sure
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