Hi Heiko,
On 25/06/13 13:56, Heiko Stübner wrote:
As the binding for slew-rate is under discussion and seems to need
more tought it will get removed for now, so it doesn't get an offical
s/tought/thought/
s/offical/official/
release.
Therefore remove it again from the only current user,
don't mind too much, it can easily be added back again in the future):
Reviewed-by: James Hogan james.ho...@imgtec.com
Cheers
James
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On 25/06/13 14:21, Heiko Stübner wrote:
Am Dienstag, 25. Juni 2013, 15:05:05 schrieb James Hogan:
Hi Heiko,
On 25/06/13 13:56, Heiko Stübner wrote:
As the binding for slew-rate is under discussion and seems to need
more tought it will get removed for now, so it doesn't get an offical
s
On 25/06/13 14:32, Linus Walleij wrote:
On Tue, Jun 25, 2013 at 3:27 PM, James Hogan james.ho...@imgtec.com wrote:
On 25/06/13 14:21, Heiko Stübner wrote:
My thoughts were that this code would never be reached when the parsing was
removed and to not cause confusion to the driver when
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated by device tree and supports interrupts for
all GPIOs.
Signed-off-by: James Hogan
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr
...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
James Hogan (3):
gpio-tz1090: add TZ1090 gpio driver
gpio-tz1090-pdc: add TZ1090 PDC gpio driver
gpio-tz1090: convert to use generic irqchip
.../devicetree/bindings/gpio/gpio
On 25/06/13 14:22, Linus Walleij wrote:
Can't we just try to come up with a patch that nails down the meaning of
slew rate in some meaningful manner then?
So according to:
http://en.wikipedia.org/wiki/Slew_rate
a proper expression for slew rate would be dV/dt i.e.
something like microvolts
On 24/06/13 14:34, Grant Likely wrote:
On Thu, 20 Jun 2013 10:26:28 +0100, James Hogan james.ho...@imgtec.com
wrote:
diff --git a/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
b/Documentation/devicetree/bindings/gpio/gpio-tz1090.txt
new file mode 100644
index 000..e017d4b
On 24/06/13 15:48, James Hogan wrote:
On 24/06/13 14:34, Grant Likely wrote:
Similarly, can this driver use the generic irq chip to eliminate the
above hooks?
hmm, I could probably get away with it for irq callbacks since a bank's
IRQ cannot be shared with non-Linux threads/cores.
I just
On 24/06/13 16:04, Linus Walleij wrote:
On Thu, Jun 20, 2013 at 11:26 AM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller (PDC
...@redhat.com
Cc: Aurelien Jacquiot a-jacqu...@ti.com
Cc: James Hogan james.ho...@imgtec.com
Cc: Michal Simek mon...@monstr.eu
Cc: Ralf Baechle r...@linux-mips.org
Cc: Jonas Bonn jo...@southpole.se
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: x
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated by device tree and supports interrupts for
all GPIOs.
Signed-off-by: James Hogan
onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr
...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
James Hogan (4):
pinctrl-tz1090: add TZ1090 pinctrl driver
gpio-tz1090: add TZ1090 gpio driver
pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver
gpio-tz1090-pdc: add TZ1090 PDC
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr
Include *.dtsi files from *.dts using the preprocessor to set a good
example for future device tree files. Files included in the old way
don't get pre-processed.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: devicetree-discuss@lists.ozlabs.org
---
arch/metag/boot/dts/skeleton.dts
for DT bindings) merged in v3.10-rc1.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Stephen Warren swar...@nvidia.com
Cc: Michal Marek mma...@suse.cz
Cc: Shawn Guo shawn@linaro.org
Cc: Rob Herring rob.herr...@calxeda.com
Cc: linux-kbu...@vger.kernel.org
Cc: devicetree-discuss
On 18/06/13 10:05, Linus Walleij wrote:
On Tue, Jun 18, 2013 at 10:51 AM, James Hogan james.ho...@imgtec.com wrote:
Should we be standardizing the pins/groups/function properties too,
since the strings are pretty much passed straight through? The usage
seems pretty similar between
. It also handles the set_wake interrupt
operation to enable/disable the appropriate wake event bits.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Thomas Gleixner t
On 18/06/13 09:05, Linus Walleij wrote:
On Mon, Jun 17, 2013 at 8:50 PM, Laurent Pinchart
laurent.pinchart+rene...@ideasonboard.com wrote:
Hello,
Here's the seventh (and hopefully final) version of the SuperH and SH Mobile
pin controllers (PFC) DT support patch set.
The patches have been
for some pinconfig params
pinctrl: clarify some dt pinconfig options
pinctrl: handle zero found dt pinconfig properties better
pinctrl: dynamically alloc temp array when parsing dt pinconf options
patches 1-4:
Reviewed-by: James Hogan james.ho...@imgtec.com
Cheers
James
pinctrl: rockchip
). If found the get_core_freq machine callback is
overridden to obtain the core clock frequency using that clock.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Mike Turquette mturque...@linaro.org
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr...@calxeda.com
Cc: devicetree
. These are followed by
various fixes from Markos (mostly sparse related).
James Hogan (2):
metag: init common clk and use core clk
metag: log core and timer frequencies from arch code
Markos Chandras (8):
metag/kernel/irq.c: Declare root_domain as static
metag/asm/irq.h: Declare init_IRQ
metag
On 24/05/13 17:21, James Hogan wrote:
If no init_machine callback is provided, call of_platform_populate()
instead. This allows a board/SoC that only needs to call
of_platform_populate to omit the callback altogether.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely
On 24/05/13 17:21, James Hogan wrote:
Add really minimal support for Toumaz Xenif TZ1090 SoC (A.K.A. Comet).
This consists of minimal build infrastructure, device tree files, and a
defconfig based on meta2_defconfig.
This SoC contains a 2-threaded HTP (Meta 2) as the main application
On 11/06/13 23:03, Laurent Pinchart wrote:
Document DT properties for the generic pinctrl parameters and add a
parser function.
Signed-off-by: Laurent Pinchart laurent.pinchart+rene...@ideasonboard.com
---
.../bindings/pinctrl/pinctrl-bindings.txt | 29 +++
On 29/05/13 17:12, James Hogan wrote:
On 29/05/13 16:38, Linus Walleij wrote:
On Fri, May 24, 2013 at 6:21 PM, James Hogan james.ho...@imgtec.com wrote:
+Optional properties:
+- gpio-ranges: Mapping to pin controller pins
+
+- interrupts: Individual syswake interrupts (other GPIOs cannot
On 29/05/13 16:32, Linus Walleij wrote:
On Fri, May 24, 2013 at 6:21 PM, James Hogan james.ho...@imgtec.com wrote:
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC
On 29/05/13 16:38, Linus Walleij wrote:
On Fri, May 24, 2013 at 6:21 PM, James Hogan james.ho...@imgtec.com wrote:
+Optional properties:
+- gpio-ranges: Mapping to pin controller pins
+
+- interrupts: Individual syswake interrupts (other GPIOs cannot interrupt)
+
+
+Example
...@landley.net
Cc: Thomas Gleixner t...@linutronix.de
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-...@vger.kernel.org
James Hogan (9):
metag: of_platform_populate from arch generic code
metag: minimal TZ1090 (Comet) SoC infrastructure
irq-imgpdc: add ImgTec PDC irqchip driver
pinconf-generic
If no init_machine callback is provided, call of_platform_populate()
instead. This allows a board/SoC that only needs to call
of_platform_populate to omit the callback altogether.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
. It also handles the set_wake interrupt
operation to enable/disable the appropriate wake event bits.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Thomas Gleixner t
boards and digital
radios, such as the Minimorph Development Platform.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Arnd Bergmann a...@arndb.de
Cc: linux-...@vger.kernel.org
onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
On 16/05/13 23:22, Stephen Boyd wrote:
On 05/16/13 02:56, James Hogan wrote:
On 15/05/13 23:31, Stephen Boyd wrote:
Can you please Cc the devicetree mailing list when proposing new bindings?
Erm, I think it was on Cc (devicetree-discuss@lists.ozlabs.org yeh?)
I added them in my reply.
Ah
Hi Linus,
On 15/05/13 20:07, Linus Walleij wrote:
On Tue, May 14, 2013 at 2:22 PM, James Hogan james.ho...@imgtec.com wrote:
I think that's the other way around, i.e. that's talking about mapping
several pingroups to the same function. The next paragraph is closer to
the problem
On 15/05/13 23:31, Stephen Boyd wrote:
On 05/10/13 08:02, James Hogan wrote:
This adds a metag architecture specific clk-gate and clk-mux which
extends the generic ones to use global lock2 to protect the register
fields. It is common with metag to have an RTOS running on a different
thread
On 14/05/13 12:52, Linus Walleij wrote:
On Fri, May 3, 2013 at 5:06 PM, James Hogan james.ho...@imgtec.com wrote:
[me]
Thus this part of the problem (poking that select bit)
should be handled by the pinmux part of the driver.
The pinconf part does not need to know about it.
Okay, so how
to handle this.
It behaves similar to a fixed rate clock (read-only), except it needs
information about a register field (reg, shift, width), and the
clock-frequency is a mapping from register field values to clock
frequencies.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Mike Turquette
(which is the
default behaviour of the generic clk-divider), the 8250 core won't allow
the highest baud rate to be used, so if an explicit frequency is
specified we always report that to the 8250 core.
The device tree bindings document is also updated accordingly.
Signed-off-by: James Hogan
Hi Linus,
On 03/05/13 09:49, Linus Walleij wrote:
On Fri, Apr 26, 2013 at 11:22 AM, James Hogan james.ho...@imgtec.com wrote:
So basically a bunch of global registers (e.g. pinctrl and gpio) are
shared between all 3 cores (up to 4 OSes). The __global_lock2 should do
all that is required
Hi Linus,
On 03/05/13 10:13, Linus Walleij wrote:
On Fri, Apr 26, 2013 at 1:54 PM, James Hogan james.ho...@imgtec.com wrote:
On 25/04/13 23:39, Linus Walleij wrote:
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
+static const struct cfg_param {
+ const char
Hi Linus,
On 03/05/13 14:03, Linus Walleij wrote:
On Fri, May 3, 2013 at 2:23 PM, James Hogan james.ho...@imgtec.com wrote:
[Me]
If what you need is to set the pin into GPIO mode to drive it
to some default state then from pinconf-generic.h you should use
one of the existing defines like
Hi Linus,
Thanks for reviewing these patches.
On 26/04/13 00:01, Linus Walleij wrote:
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled
Hi Linus,
On 25/04/13 23:39, Linus Walleij wrote:
On Tue, Apr 23, 2013 at 4:33 PM, James Hogan james.ho...@imgtec.com wrote:
Add a pin control driver for the main pins on the TZ1090 SoC. This
doesn't include the low-power pins as they're controlled separately via
the Powerdown Controller
Hi Thomas,
On 23/04/13 16:09, Thomas Gleixner wrote:
On Tue, 23 Apr 2013, James Hogan wrote:
+pdc_write(priv, PDC_IRQ_ROUTE, irq_route);
+spin_unlock_irqrestore(priv-lock, flags);
+}
+
+static void perip_irq_unmask(struct irq_data *data)
+{
+struct pdc_intc_priv *priv
On 24/04/13 15:51, James Hogan wrote:
On 24/04/13 14:26, Catalin Marinas wrote:
On 23 April 2013 17:06, James Hogan james.ho...@imgtec.com wrote:
It's certainly heading in that direction a lot. For this patchset I
could get away with dropping arch/metag/soc/*, and deal with anything
Thanks for the review Thomas!
On 23/04/13 16:09, Thomas Gleixner wrote:
On Tue, 23 Apr 2013, James Hogan wrote:
+/**
+ * struct pdc_intc_priv - private pdc interrupt data.
+ * @nr_perips: Number of peripheral interrupt signals.
+ * @nr_syswakes:Number of syswake signals
On 24/04/13 14:26, Catalin Marinas wrote:
On 23 April 2013 17:06, James Hogan james.ho...@imgtec.com wrote:
On 23/04/13 16:25, Arnd Bergmann wrote:
On Tuesday 23 April 2013, James Hogan wrote:
@@ -46,6 +46,12 @@ core-y+=
arch/metag/boot/dts/
core-y
Add asm/soc-tz1090/gpio.h with definitions to number all the GPIOs
available on-chip. This is for use by the pinctrl and GPIO drivers.
Signed-off-by: James Hogan james.ho...@imgtec.com
---
arch/metag/include/asm/soc-tz1090/gpio.h | 121 +++
1 file changed, 121
in a number of development boards and digital
radios, such as the Minimorph Development Platform.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Arnd Bergmann a...@arndb.de
Cc
(at least the
first two patches) so all review is very much appreciated.
Cc: Arnd Bergmann a...@arndb.de
Cc: Thomas Gleixner t...@linutronix.de
James Hogan (8):
metag: of_platform_populate from arch generic code
metag: minimal TZ1090 (Comet) SoC infrastructure
irq-imgpdc: add ImgTec PDC irqchip
If no init_machine callback is provided, call of_platform_populate()
instead. This allows a board/SoC that only needs to call
of_platform_populate to omit the callback altogether.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
Add a GPIO driver for the low-power Powerdown Controller GPIOs in the
TZ1090 SoC.
The driver is instantiated by device tree and supports interrupts for
the SysWake GPIOs only.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr
. It also handles the set_wake interrupt
operation to enable/disable the appropriate wake event bits.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Thomas Gleixner t
Add a GPIO driver for the main GPIOs found in the TZ1090 (Comet) SoC.
This doesn't include low-power GPIOs as they're controlled separately
via the Powerdown Controller (PDC) registers.
The driver is instantiated by device tree and supports interrupts for
all GPIOs.
Signed-off-by: James Hogan
Thanks for reviewing Arnd.
On 23/04/13 16:25, Arnd Bergmann wrote:
On Tuesday 23 April 2013, James Hogan wrote:
@@ -46,6 +46,12 @@ core-y+=
arch/metag/boot/dts/
core-y += arch/metag/kernel/
core-y
On 06/02/13 14:28, Grant Likely wrote:
On Wed, Feb 6, 2013 at 1:32 PM, James Hogan james.ho...@imgtec.com wrote:
On 06/02/13 13:11, Grant Likely wrote:
- Resources on platform_devices get registered so they appear in
/proc/iomem and /proc/ioports and so that device drivers get the added
On 06/02/13 13:11, Grant Likely wrote:
Hi Stephen,
I've just pushed out a change which cleans up platform device
registration to use the same path whether or not the device tree is
used. It should be safe, but there is a risk of breakage on powerpc
platforms.
The patch has two effects of
-by: James Hogan james.ho...@imgtec.com
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Hi Vineet,
arm64 also adds dtbs and $(dtb-y) to targets (at least in linux-next). I
think this makes sure that they don't get rebuilt unless they've
actually changed. I've also copied this for metag.
Did you verify that it makes a difference - at least at my end it's not - the
default dtb
Add device tree files to arch/metag.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Sam Ravnborg s...@ravnborg.org
---
v4:
* move dtb directory into dts and use
Hi Vineet,
On 24/01/13 10:50, Vineet Gupta wrote:
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 4d52a3b..90570f9 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -83,6 +83,9 @@ head-y := arch/arc/kernel/head.o
# See arch/arc/Kbuild for content of core part
trigger for the current thread. This is demultiplexed in
irq-meta-ext.c to individual Linux IRQs for each external SoC interrupt.
The external irqchip has devicetree bindings for configuring the number
of irq banks and the type of masking available.
Signed-off-by: James Hogan james.ho...@imgtec.com
On 05/12/12 22:28, Grant Likely wrote:
On Wed, 5 Dec 2012 16:08:24 +, James Hogan james.ho...@imgtec.com wrote:
The powervr prefix which is currently described as Imagination
Technologies isn't really appropriate for non-PowerVR hardware, so
deprecate it, changing the description
-by: James Hogan james.ho...@imgtec.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: devicetree-discuss@lists.ozlabs.org
---
.../devicetree/bindings/vendor-prefixes.txt|3 ++-
1 files changed, 2 insertions(+), 1
The powervr prefix which is currently described as Imagination
Technologies isn't really appropriate for non-PowerVR hardware, so
change the description of powervr to PowerVR (Imagination
Technologies Ltd.), and add a separate img prefix for Imagination
Technologies Ltd..
Signed-off-by: James
On 01/11/12 01:38, Rob Herring wrote:
On 10/31/2012 11:13 AM, James Hogan wrote:
@@ -34,7 +35,7 @@ nintendo Nintendo
nvidia NVIDIA
nxp NXP Semiconductors
picochipPicochip Ltd
-powervr Imagination Technologies
+powervr PowerVR (Imagination Technologies Ltd.)
Perhaps
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