On Mon, Jul 15, 2013 at 08:32:39PM -0300, Ezequiel Garcia wrote:
Now that the 'reg' property meaning has been changed,
this commit updates the deivce-tree binding documentation.
nit. s/deivce/device/
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
On Tue, Jul 16, 2013 at 09:14:33AM -0300, Ezequiel Garcia wrote:
On the other side, I'm much interested in knowing if you are OK with
breaking the watchdog DT compatibility. If you NACK this, then I'll
start preparing a different watchdog driver for 370/XP, since I don't
want to extend a
On Sat, Jul 13, 2013 at 12:56:25PM -0700, Olof Johansson wrote:
On Wed, Jul 10, 2013 at 2:50 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Jul 10, 2013 at 10:08:50PM +0800, Haojian Zhuang wrote:
On Wed, Jul 10, 2013 at 8:24 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Jul 10
On Fri, Jul 12, 2013 at 09:10:49AM -0600, Daniel Drake wrote:
On Thu, Jul 11, 2013 at 5:54 PM, Haojian Zhuang
haojian.zhu...@gmail.com wrote:
Well, Daniel Drake spoke up for OLPC. Does that count?
We don't know they used DT on Marvell MMP2/MMP3. So they don't have DTS file
in kernel, we
On Fri, Jul 12, 2013 at 10:05:45AM -0600, Daniel Drake wrote:
On Fri, Jul 12, 2013 at 9:57 AM, Jason Cooper ja...@lakedaemon.net wrote:
This also means we should do a patch for stable v3.5+ appending the
mrvl,... string to the drivers that had it removed improperly, as
Daniel discovered
Neil,
On Wed, Jul 10, 2013 at 12:25:17AM -0700, Neil Zhang wrote:
Jason,
-Original Message-
From: Jason Cooper [mailto:ja...@lakedaemon.net]
Sent: 2013年7月9日 20:49
To: Neil Zhang
Cc: grant.lik...@linaro.org; haojian.zhu...@gmail.com; a...@arndb.de;
devicetree-discuss
On Wed, Jul 10, 2013 at 04:19:46PM +0800, Haojian Zhuang wrote:
On Tue, Jul 9, 2013 at 8:49 PM, Jason Cooper ja...@lakedaemon.net wrote:
Neil,
On Tue, Jul 09, 2013 at 02:42:44PM +0800, Neil Zhang wrote:
The documented vendor prefix for Marvell is 'marvell', not 'mrvl', so
let's change
On Wed, Jul 10, 2013 at 03:50:10PM -0500, Matt Sealey wrote:
On Tue, Jul 9, 2013 at 7:49 AM, Jason Cooper ja...@lakedaemon.net wrote:
Neil,
I agree with the need to change, however, this has been in the binding
documentation since v3.5. I wish we had caught this when we decided
against
On Wed, Jul 10, 2013 at 10:08:50PM +0800, Haojian Zhuang wrote:
On Wed, Jul 10, 2013 at 8:24 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Jul 10, 2013 at 04:19:46PM +0800, Haojian Zhuang wrote:
On Tue, Jul 9, 2013 at 8:49 PM, Jason Cooper ja...@lakedaemon.net wrote:
Neil
Neil,
On Tue, Jul 09, 2013 at 02:42:44PM +0800, Neil Zhang wrote:
The documented vendor prefix for Marvell is 'marvell', not 'mrvl', so
let's change it.
Signed-off-by: Neil Zhang zhan...@marvell.com
---
.../devicetree/bindings/arm/mrvl/intc.txt | 16 +++---
On Tue, Jul 09, 2013 at 12:50:47PM -0600, Bjorn Helgaas wrote:
On Tue, Jul 9, 2013 at 12:20 PM, Jason Cooper ja...@lakedaemon.net wrote:
Bjorn,
On Tue, Jul 09, 2013 at 01:41:13PM -0300, Ezequiel Garcia wrote:
From: Thomas Petazzoni thomas.petazz...@free-electrons.com
The new device
On Fri, Jun 21, 2013 at 10:30:47AM +0200, Arnd Bergmann wrote:
On Friday 21 June 2013, Thomas Petazzoni wrote:
I am by far not an expert on how to solve merge strategies and so on,
but to avoid conflicts at Linus's level while merging the arm-soc and
pci trees, it would be better if this
On Tue, Jun 18, 2013 at 04:47:57PM -0300, Ezequiel Garcia wrote:
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013 05:31 PM, Ezequiel Garcia wrote:
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal
On Wed, Jun 19, 2013 at 03:42:27PM -0300, Ezequiel Garcia wrote:
On Wed, Jun 19, 2013 at 3:36 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Tue, Jun 18, 2013 at 04:47:57PM -0300, Ezequiel Garcia wrote:
On Tue, Jun 18, 2013 at 09:42:48PM +0200, Sebastian Hesselbarth wrote:
On 06/18/2013
On Wed, Jun 19, 2013 at 04:29:16PM -0300, Ezequiel Garcia wrote:
On Wed, Jun 19, 2013 at 09:08:30PM +0200, Arnd Bergmann wrote:
On Wednesday 19 June 2013, Ezequiel Garcia wrote:
What happens is that any decoding window that was setup by the
bootloader,
is wiped and completely
On Wed, Jun 19, 2013 at 05:07:17PM -0300, Ezequiel Garcia wrote:
This patch adds static window allocation to the device tree binding.
Each first-child of the mbus-compatible node, with a suitable 'ranges'
property, declaring an address translation, will trigger an address
decoding window
On Wed, Jun 19, 2013 at 05:07:20PM -0300, Ezequiel Garcia wrote:
Now that mbus device tree binding has been introduced, remove the address
decoding window management from this driver.
A suitable 'ranges' entry should be added to the devbus-compatible node in
the device tree, as described by
On Tue, Jun 18, 2013 at 08:25:31AM -0300, Ezequiel Garcia wrote:
Now that mbus device tree binding has been introduced, remove the address
decoding window management from this driver.
A suitable 'ranges' entry should be added to the devbus-compatible node in
the device tree, as described by
On Tue, Jun 18, 2013 at 02:17:31PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Tue, 18 Jun 2013 07:39:20 -0400, Jason Cooper wrote:
On Tue, Jun 18, 2013 at 08:25:31AM -0300, Ezequiel Garcia wrote:
Now that mbus device tree binding has been introduced, remove the address
On Tue, Jun 11, 2013 at 03:13:16PM +0200, Thomas Gleixner wrote:
On Tue, 11 Jun 2013, Sebastian Hesselbarth wrote:
On 06/11/13 14:35, Ezequiel Garcia wrote:
With Thomas Gleixner's Review now only somebody has to take the irqchip
patch then all three drivers are queued for next release.
I
On Mon, Jun 10, 2013 at 07:06:38PM +0200, Daniel Lezcano wrote:
On 06/10/2013 06:47 PM, Sebastian Hesselbarth wrote:
On 06/10/13 18:44, Daniel Lezcano wrote:
On 06/10/2013 06:31 PM, Sebastian Hesselbarth wrote:
On 06/10/13 18:04, Daniel Lezcano wrote:
On 06/10/2013 11:35 AM, Sebastian
On Fri, Jun 07, 2013 at 01:47:38PM -0300, Ezequiel Garcia wrote:
In order to clean message printing, we replace pr_info with pr_fmt.
This is purely cosmetic change, with the sole purpose of making
the code a bit more readable.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
On Fri, Jun 07, 2013 at 01:47:49PM -0300, Ezequiel Garcia wrote:
These properties are not needed so it's safe to remove them.
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
arch/arm/boot/dts/armada-370.dtsi | 4
1 file changed, 4 deletions(-)
Also as mentioned
of mv643xx_eth DT support (current net-next) that will add to both irqchip
and clocksource branches respectively. Therefore, I suggest that irq
and clocksource maintainers take in the mere drivers (Patches 1+2) and
Jason Cooper handles the remaining patches when all three drivers have
surfaced
Gerlando,
On Wed, Jun 05, 2013 at 11:04:38AM +0200, Sebastian Hesselbarth wrote:
On 06/04/13 22:53, Gerlando Falauto wrote:
...
Sorry, I am really more than lost when it's about tracking
how/where/when changes are pulled. Any mainlining for dummies pointer
would be more than appreciated.
On Tue, Jun 04, 2013 at 12:34:42PM +0200, Sebastian Hesselbarth wrote:
On 06/04/13 12:18, Gerlando Falauto wrote:
I noticed how most of the DT-aware board-setup files only have a single
board_init() function, calling kirkwood_ge00_init() with a struct
mv643xx_eth_platform_data as a single
On Tue, Jun 04, 2013 at 01:59:27PM +0200, Simon Guinot wrote:
On Tue, Jun 04, 2013 at 06:43:02AM -0400, Jason Cooper wrote:
On Tue, Jun 04, 2013 at 12:34:42PM +0200, Sebastian Hesselbarth wrote:
On 06/04/13 12:18, Gerlando Falauto wrote:
I noticed how most of the DT-aware board-setup
On Tue, Jun 04, 2013 at 08:05:00AM -0400, Jason Cooper wrote:
On Tue, Jun 04, 2013 at 01:59:27PM +0200, Simon Guinot wrote:
On Tue, Jun 04, 2013 at 06:43:02AM -0400, Jason Cooper wrote:
On Tue, Jun 04, 2013 at 12:34:42PM +0200, Sebastian Hesselbarth wrote:
On 06/04/13 12:18, Gerlando
On Sun, Jun 02, 2013 at 07:30:53PM -0700, Guenter Roeck wrote:
On Sun, Jun 02, 2013 at 10:14:05PM +0200, Arnaud Ebalard wrote:
...
note: this should not be an issue but this v3 is based on
jcooper/mvebu/fixes branch.
I don't know about this branch/repository. If there are hwmon
All,
On Mon, May 27, 2013 at 11:38:41AM +0800, Wei Yongjun wrote:
From: Wei Yongjun yongjun_...@trendmicro.com.cn
In case of error, function of_clk_get_by_name() returns
ERR_PTR() never returns NULL. The NULL test in the return
value check should be replaced with IS_ERR().
Signed-off-by:
On Fri, May 24, 2013 at 01:03:25PM +0200, Linus Walleij wrote:
On Fri, May 24, 2013 at 12:40 AM, Sebastian Hesselbarth
sebastian.hesselba...@gmail.com wrote:
On 05/23/2013 08:40 PM, Jason Cooper wrote:
I think marvell,psc1_reset =; gives us the most flexibility in
accurately describing
On Wed, May 22, 2013 at 09:25:02PM +0200, Simon Baatz wrote:
Hi Jason,
On Tue, May 21, 2013 at 09:14:55AM -0400, Jason Cooper wrote:
On Tue, May 21, 2013 at 01:01:41AM +0200, Simon Baatz wrote:
Hi,
V3 changes:
- Patch 01/10: Added EPROBE_DEFER case to mmc_of_parse
On Tue, May 21, 2013 at 01:01:41AM +0200, Simon Baatz wrote:
Hi,
V3 changes:
- Patch 01/10: Added EPROBE_DEFER case to mmc_of_parse()
- Added Acked-By to (unmodified) patches 02 and 03.
V2 changes:
- Converted mvsdio to use mmc_of_parse()
- Adapted
On Mon, May 20, 2013 at 09:03:00AM +0200, Linus Walleij wrote:
On Sun, May 19, 2013 at 10:31 PM, Jason Cooper ja...@lakedaemon.net wrote:
patches 2, 3, and 4 applied to mvebu/of_pci to facilitate others
(LinusW) basing their work off of it.
Thanks, is this going to be pulled into ARM SoC
On Sun, May 19, 2013 at 04:47:03PM -0400, Jason Cooper wrote:
On Thu, May 16, 2013 at 05:55:20PM +0200, Thomas Petazzoni wrote:
The Armada 370 has two gatable clocks for each PCIe interface, and we
want both of them to be enabled. We therefore make one of the two
clocks a child of the other
On Thu, May 16, 2013 at 05:55:16PM +0200, Thomas Petazzoni wrote:
Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use
the range property') all the device nodes of Armada 370/XP are under a
common 'ranges' property that translates the device register addresses
into their
On Thu, May 16, 2013 at 05:55:17PM +0200, Thomas Petazzoni wrote:
From: Andrew Murray andrew.mur...@arm.com
This patch factors out common implementation patterns to reduce overall kernel
code and provide a means for host bridge drivers to directly obtain struct
resources from the DT's ranges
On Thu, May 16, 2013 at 05:55:20PM +0200, Thomas Petazzoni wrote:
The Armada 370 has two gatable clocks for each PCIe interface, and we
want both of them to be enabled. We therefore make one of the two
clocks a child of the other, as we did for the sataX and sataXlnk
clocks on Armada XP.
On Thu, May 16, 2013 at 05:55:24PM +0200, Thomas Petazzoni wrote:
Now that we have the necessary drivers and Device Tree informations to
support PCIe on Armada 370 and Armada XP, enable the CONFIG_PCI
option.
Also, since the Armada 370 Mirabox has a built-in USB XHCI controller
connected on
Mike, Sebastian,
On Thu, May 16, 2013 at 10:26:24AM +0200, Sebastian Hesselbarth wrote:
On 05/16/2013 09:44 AM, Thomas Petazzoni wrote:
Dear Mike Turquette,
On Wed, 15 May 2013 14:41:54 -0700, Mike Turquette wrote:
Quoting Thomas Petazzoni (2013-05-15 06:25:19)
The Armada 370 has two
On Thu, May 16, 2013 at 06:33:14AM -0300, Ezequiel Garcia wrote:
On Wed, May 15, 2013 at 03:25:21PM +0200, Thomas Petazzoni wrote:
[..]
+
+static int __init mvebu_pcie_probe(struct platform_device *pdev)
+{
+ struct mvebu_pcie *pcie;
+ struct device_node *np = pdev-dev.of_node;
+
On Thu, May 16, 2013 at 05:49:03PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 16 May 2013 11:40:31 -0400, Jason Cooper wrote:
+static int mvebu_pcie_init(void)
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll
On Thu, May 16, 2013 at 06:08:50PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 16 May 2013 11:56:17 -0400, Jason Cooper wrote:
Building this showed a warning here. It seems you forgot
to mark this one as __init.
Thomas, I'll fix this up when I pull
On Mon, May 13, 2013 at 11:18:58PM +0200, Simon Baatz wrote:
In order to prepare the switch to the standard MMC device tree parser
for mvsdio, adapt all current uses of mvsdio in the dts files to the
standard format.
Signed-off-by: Simon Baatz gmbno...@gmail.com
---
On Mon, May 13, 2013 at 11:19:00PM +0200, Simon Baatz wrote:
Signed-off-by: Simon Baatz gmbno...@gmail.com
---
arch/arm/boot/dts/Makefile|2 +
arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi | 97
+
On Mon, May 13, 2013 at 11:19:01PM +0200, Simon Baatz wrote:
Signed-off-by: Simon Baatz gmbno...@gmail.com
---
arch/arm/mach-kirkwood/Kconfig|7 +++
arch/arm/mach-kirkwood/Makefile |1 +
arch/arm/mach-kirkwood/board-dt.c |4
accordingly.
Signed-off-by: Sebastian Hesselbarth sebastian.hesselba...@gmail.com
---
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Linus Walleij linus.wall...@linaro.org
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Stephen Warren
On Mon, May 13, 2013 at 10:03:57PM +0200, Sebastian Hesselbarth wrote:
On 05/13/2013 10:00 PM, Jason Cooper wrote:
On Tue, May 07, 2013 at 01:36:08AM +0200, Sebastian Hesselbarth wrote:
Dove power management unit can mux some special functions to mpp0-15.
This patch adds support to set/get
On Mon, May 13, 2013 at 11:18:58PM +0200, Simon Baatz wrote:
In order to prepare the switch to the standard MMC device tree parser
for mvsdio, adapt all current uses of mvsdio in the dts files to the
standard format.
Signed-off-by: Simon Baatz gmbno...@gmail.com
---
...
diff --git
On Wed, May 08, 2013 at 09:21:40AM +0200, Sebastian Hesselbarth wrote:
On 05/08/2013 09:04 AM, Valentin Longchamp wrote:
On 05/07/2013 06:36 PM, Sebastian Hesselbarth wrote:
I just checked my mails from late 2012 and there Valentin and I agreed,
that not the missing bits in clock gating
Valentin,
Nice series! I thought once the mv643xx_eth DT bindings take hold that
this was going to be one of the holdovers with a custom board init file.
Looks like that won't be the case ;-)
On Tue, May 07, 2013 at 05:52:21PM +0200, Valentin Longchamp wrote:
A new clock gating controller is
it as
relay server ;) Maybe I can turn it into a test bed for a while.
There is also Orion5x and Discovery Innovation (mv78xx0) to be tested.
@Jason Cooper: I will merge both irqchip and dove patches into one
patch set. I wasn't earlier because I didn't want the above SoCs to
slow down patch
On Fri, May 03, 2013 at 12:37:20AM +0200, Sebastian Hesselbarth wrote:
(@Jason C: Are you sure that I should merge dove and orion
irqchip patches? I doubt that anything touching generic irq
will not go through irq tree.)
Putting them in the same patch series does not imply they have to go
On Fri, May 03, 2013 at 07:06:32AM +0200, Andrew Lunn wrote:
Jason: what is the status of the ethernet driver conversion to DT?
Will it get merged this week, or is it material for the next merge
window?
You'd have to ask Florian/David Miller. I'm not sure wether David was
able to pull that in
...@linutronix.de
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Ezequiel Garcia
...@linutronix.de
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Ezequiel Garcia
rob.herr...@calxeda.com
Cc: Rob Landley r...@landley.net
Cc: Thomas Gleixner t...@linutronix.de
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
...@linutronix.de
Cc: Russell King li...@arm.linux.org.uk
Cc: Arnd Bergmann a...@arndb.de
Cc: Jason Cooper ja...@lakedaemon.net
Cc: Andrew Lunn and...@lunn.ch
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Gregory Clement gregory.clem...@free-electrons.com
Cc: Ezequiel Garcia ezequiel.gar
On Wed, Apr 24, 2013 at 12:06:20AM +0200, Arnaud Ebalard wrote:
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
Documentation/devicetree/bindings/hwmon/g762.txt | 57
++
1 file changed, 57 insertions(+)
create mode 100644
On Mon, Apr 22, 2013 at 11:41:32AM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM host bridge drivers
On Mon, Apr 22, 2013 at 12:53:43PM -0400, Jason Cooper wrote:
On Mon, Apr 22, 2013 at 11:41:32AM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser
On Fri, Apr 19, 2013 at 09:19:50AM +0200, Gabor Juhos wrote:
2013.04.18. 15:09 keltezéssel, Jason Cooper írta:
On Thu, Apr 18, 2013 at 01:59:10PM +0100, Andrew Murray wrote:
On Wed, Apr 17, 2013 at 04:42:48PM +0100, Linus Walleij wrote:
On Tue, Apr 16, 2013 at 12:18 PM, Andrew Murray
On Thu, Apr 18, 2013 at 01:48:32PM +0100, Grant Likely wrote:
On Wed, 17 Apr 2013 12:22:23 -0400, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Apr 17, 2013 at 05:17:48PM +0100, Grant Likely wrote:
On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net
wrote:
On Wed
On Thu, Apr 18, 2013 at 01:59:10PM +0100, Andrew Murray wrote:
On Wed, Apr 17, 2013 at 04:42:48PM +0100, Linus Walleij wrote:
On Tue, Apr 16, 2013 at 12:18 PM, Andrew Murray andrew.mur...@arm.com
wrote:
This patch converts the pci_load_of_ranges function to use the new common
Russell,
I saw you were back online this morning, could you please consider the
following request?
On Mon, Apr 15, 2013 at 12:36:09PM -0400, Jason Cooper wrote:
Russell,
Thanks for applying this patch (7683/1) to your tree. I see it's in
your for-next, which I understand *isn't* stable
On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com
wrote:
On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
The pci_process_bridge_OF_ranges function, used to parse the ranges
property of a
On Wed, Apr 17, 2013 at 05:17:48PM +0100, Grant Likely wrote:
On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net wrote:
On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com
wrote:
On Tue
On Tue, Apr 16, 2013 at 09:12:41AM +0200, Benjamin Herrenschmidt wrote:
On Mon, 2013-04-15 at 20:29 +0200, Linus Walleij wrote:
As agreed with Rob Herring, series applied to mvebu/drivers to
support
mvebu pcie driver.
Will this hit ARM SoC soon-ish so I can base a pull request for
On Tue, Apr 16, 2013 at 01:31:40PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Tue, 16 Apr 2013 07:29:51 -0400, Jason Cooper wrote:
Do not send this series upstream (or even in -next) until it has been at
least build-tested and acked by the affected architectures. AFAIK
On Tue, Apr 16, 2013 at 11:18:25AM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM host bridge drivers
On Mon, Apr 15, 2013 at 04:07:14AM +0100, Ben Hutchings wrote:
On Sat, 2013-04-13 at 15:00 -0400, Jason Cooper wrote:
On Sat, Apr 13, 2013 at 05:21:26PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 11 Apr 2013 12:53:03 -0400, Jason Cooper wrote
Thomas,
On Tue, Apr 09, 2013 at 11:06:21PM +0200, Thomas Petazzoni wrote:
Hello,
This series of patches introduces PCIe support for the Marvell Armada
370 and Armada XP. In the future, we plan to extend the driver to
cover Kirkwood platforms, and possibly other Marvell EBU platforms as
On Fri, Apr 12, 2013 at 04:29:05PM +0200, Gregory CLEMENT wrote:
Hi Jason,
I have just rebased the commits that you haven't applied yet. They are
rebased on mvebu/dt. I check that all the dtb can be built.
Thanks,
Gregory CLEMENT (3):
ARM: dts: mvebu: Convert all the mvebu files to
Russell,
Thanks for applying this patch (7683/1) to your tree. I see it's in
your for-next, which I understand *isn't* stable.
029baf1 ARM: 7683/1: pci: add a align_resource hook
Is there a stable branch I could depend on for the rest of this series
(particularly, patch 10)? It looks like
On Mon, Apr 15, 2013 at 06:36:23PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Mon, 15 Apr 2013 11:46:20 -0400, Jason Cooper wrote:
* Patches 1-5 are awaiting a formal Acked-by from the Device Tree
maintainers. Patches 1-3 are the new version of the OF PCI range
Andrew Murray, Thomas,
On Thu, Apr 11, 2013 at 04:26:06PM +0100, Andrew Murray wrote:
This patchset factors out duplicated code associated with parsing PCI
DT ranges properties across the architectures and introduces a
ranges parser. This parser of_pci_range_parser can be used directly
by ARM
On Mon, Apr 15, 2013 at 08:29:06PM +0200, Linus Walleij wrote:
On Mon, Apr 15, 2013 at 7:56 PM, Jason Cooper ja...@lakedaemon.net wrote:
As agreed with Rob Herring, series applied to mvebu/drivers to support
mvebu pcie driver.
Will this hit ARM SoC soon-ish so I can base a pull request
On Sat, Apr 13, 2013 at 05:21:26PM +0200, Thomas Petazzoni wrote:
Dear Jason Cooper,
On Thu, 11 Apr 2013 12:53:03 -0400, Jason Cooper wrote:
With this and Thomas' pci series, we will have Kirkwood fully
converted to devicetree, can begin removing board files, and finally
begin
Florian,
On Thu, Apr 04, 2013 at 12:27:10PM +0200, Florian Fainelli wrote:
Hi all,
This patch serie implements mv643xx_eth device tree bindings. I opted for
the reuse of the bindings already defined in
Documentation/devicetree/bindings/marvell.txt so that we do not create
any confusion.
On Tue, Apr 09, 2013 at 12:52:10AM +0200, Gregory CLEMENT wrote:
When LPAE is activated on Armada XP, all registers and IOs are still
32bit, the 40bit extension is on the CPU to DRAM path (windows) only.
That means that all the DMA transfer are restricted to the low 32 bits
address space. This
On Tue, Apr 09, 2013 at 12:52:11AM +0200, Gregory CLEMENT wrote:
From: Lior Amsalem al...@marvell.com
In order to be able to support the LPAE, the internal registers
virtual base must be aligned to 2MB. In LPAE section size is 2MB, in
earlyprintk we map the internal registers and it must be
On Tue, Apr 09, 2013 at 12:52:12AM +0200, Gregory CLEMENT wrote:
From: Lior Amsalem al...@marvell.com
pj4b cpus are LPAE capable so enable them on LPAE compilations
Signed-off-by: Lior Amsalem al...@marvell.com
Tested-by: Franklin f...@marvell.com
Signed-off-by: Gregory CLEMENT
On Thu, Apr 11, 2013 at 10:41:34PM +0200, Gregory CLEMENT wrote:
Hi Jason,
On 04/11/2013 08:08 PM, Jason Cooper wrote:
On Tue, Apr 09, 2013 at 12:52:12AM +0200, Gregory CLEMENT wrote:
From: Lior Amsalem al...@marvell.com
pj4b cpus are LPAE capable so enable them on LPAE compilations
On Tue, Apr 09, 2013 at 12:52:13AM +0200, Gregory CLEMENT wrote:
From: Lior Amsalem al...@marvell.com
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT gregory.clem...@free-electrons.com
Signed-off-by: Lior Amsalem
On Thu, Apr 11, 2013 at 10:48:27PM +0200, Gregory CLEMENT wrote:
Hi Jason,
On 04/11/2013 08:12 PM, Jason Cooper wrote:
On Tue, Apr 09, 2013 at 12:52:13AM +0200, Gregory CLEMENT wrote:
From: Lior Amsalem al...@marvell.com
In order to be able to use more than 4GB address-cells and size
On Tue, Apr 09, 2013 at 11:06:33PM +0200, Thomas Petazzoni wrote:
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.
Signed-off-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
---
On Thu, Apr 11, 2013 at 08:28:11PM -0400, Jason Cooper wrote:
On Tue, Apr 09, 2013 at 11:06:33PM +0200, Thomas Petazzoni wrote:
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.
Signed-off-by: Thomas
Thomas,
On Wed, Apr 03, 2013 at 12:52:47PM +0200, Thomas Petazzoni wrote:
Jason (Cooper),
Do you mind taking this patch in your mvebu/drivers branch, next to the
patch adding the mvebu-mbus driver? Or do you want a new mvebu-mbus
driver patch that contains this fix and would replace the one
changed, 17 insertions(+), 61 deletions(-)
Acked-by: Jason Cooper ja...@lakedaemon.net
thx,
Jason.
___
devicetree-discuss mailing list
devicetree-discuss@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/devicetree-discuss
On Tue, Apr 02, 2013 at 09:12:02AM +1100, Ryan Mallon wrote:
On 02/04/13 08:44, Ryan Mallon wrote:
On 01/04/13 08:56, Alexander Clouter wrote:
Currently there are two users of rtc-m48t86 (mach-ep93xx/ts72xx.c and
mach-orion5x/ts78xx-setup.c) and both just use {read,write}b against
a
Thomas, Arnd, Olof, Russell, Grant, Bjorn,
On Wed, Mar 27, 2013 at 03:40:17PM +0100, Thomas Petazzoni wrote:
Hello,
This series of patches introduces PCIe support for the Marvell Armada
370 and Armada XP. In the future, we plan to extend the driver to
cover Kirkwood platforms, and possibly
On Fri, Mar 29, 2013 at 07:14:37PM +0100, Florian Fainelli wrote:
This patch modifies kirkwood.dtsi to specify the various gigabit
interfaces nodes available on kirkwood devices. They are disabled by
default and should be enabled on a per-board basis. egiga0 and egiga1
aliases are defined for
/marvell/mvmdio.c | 130 ++---
include/linux/mv643xx_eth.h|1 -
9 files changed, 187 insertions(+), 239 deletions(-)
Whole series applied on top of v3.9-rc3 and tested on dreamplug
(kirkwood DT boot with legacy mv643xx_eth init)
Tested-by: Jason Cooper
On Fri, Mar 22, 2013 at 03:24:55PM +0100, Florian Fainelli wrote:
Le 03/22/13 15:14, Jason Cooper a écrit :
On Fri, Mar 22, 2013 at 02:39:24PM +0100, Florian Fainelli wrote:
Hi all,
This patch converts the mv643xx_eth driver to use the mvmdio MDIO bus driver
instead of rolling its own
On Thu, Mar 21, 2013 at 09:22:36PM +0100, Thomas Petazzoni wrote:
Dear Andrew Lunn,
On Thu, 21 Mar 2013 21:15:33 +0100, Andrew Lunn wrote:
Could you recommend a document which introduces LPAE.
Only being able to address 7GB seems a bit odd to me. I kind of
expected you set up the
Florian,
Any word on version 2 of this series? I'd like to base the conversion
of kirkwood to DT based ethernet init on it.
thx,
Jason.
On Tue, Jan 29, 2013 at 04:24:03PM +0100, Florian Fainelli wrote:
Hi all,
This patch converts the mv643xx_eth driver to use the mvmdio MDIO bus driver
On Thu, Mar 14, 2013 at 07:09:18PM +0100, Florian Fainelli wrote:
Hello Jason,
Le 03/14/13 18:25, Jason Cooper a écrit :
Florian,
Any word on version 2 of this series? I'd like to base the conversion
of kirkwood to DT based ethernet init on it.
Just sent them out for review, thanks
Florian,
On Thu, Mar 14, 2013 at 07:08:32PM +0100, Florian Fainelli wrote:
This patch converts the Marvell MV643XX ethernet driver to use the
Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms
registering the Marvell MV643XX ethernet driver are also updated to
register a
On Thu, Mar 14, 2013 at 08:32:57PM +0100, Florian Fainelli wrote:
Hello Jason,
Le 14/03/2013 20:02, Jason Cooper a écrit :
Florian,
On Thu, Mar 14, 2013 at 07:08:32PM +0100, Florian Fainelli wrote:
This patch converts the Marvell MV643XX ethernet driver to use the
Marvell Orion MDIO
On Wed, Feb 06, 2013 at 10:06:22AM -0300, Ezequiel Garcia wrote:
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Lior Amsalem al...@marvell.com
Acked-by: Gregory Clement gregory.clem...@free-electrons.com
Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
1 - 100 of 249 matches
Mail list logo