On Tue, Jun 25, 2013 at 09:35:30AM +0100, Luciano Coelho wrote:
Add device tree bindings documentation for the TI WiLink modules.
Currently only the WLAN part of the WiLink6, WiLink7 and WiLink8
modules is supported.
Signed-off-by: Luciano Coelho coe...@ti.com
---
I created a new
On Fri, Jun 28, 2013 at 10:53:35AM +0100, Luciano Coelho wrote:
On Fri, 2013-06-28 at 10:38 +0100, Mark Rutland wrote:
On Tue, Jun 25, 2013 at 09:35:30AM +0100, Luciano Coelho wrote:
+Optional properties:
+
+
+- refclock: the internal WLAN reference clock
[resending with the correct address for Mike Turquette]
On Fri, Jun 28, 2013 at 10:53:35AM +0100, Luciano Coelho wrote:
On Fri, 2013-06-28 at 10:38 +0100, Mark Rutland wrote:
On Tue, Jun 25, 2013 at 09:35:30AM +0100, Luciano Coelho wrote:
+Optional properties
[resending again with the doubly corrected address for Mike Turquette,
apologies for the spam]
On Fri, Jun 28, 2013 at 10:53:35AM +0100, Luciano Coelho wrote:
On Fri, 2013-06-28 at 10:38 +0100, Mark Rutland wrote:
On Tue, Jun 25, 2013 at 09:35:30AM +0100, Luciano Coelho wrote:
+Optional
Hi,
I have a couple of minor comments.
On Fri, Jun 21, 2013 at 07:14:14AM +0100, Mike Turquette wrote:
Device Tree binding for the basic clock multiplexer, plus the setup
function to register the clock. Based on the existing fixed-clock
binding.
Includes minor beautification of
On Wed, Jun 19, 2013 at 10:47:17AM +0100, Florian Fainelli wrote:
ARM CPU device tree nodes may contain an optional clock-frequency
property, when set, this property must contain the CPU frequency in Hz,
which is then used by the topology parsing code in
arch/arm/kernel/topology.c to infer the
On Thu, Jun 13, 2013 at 10:24:45AM +0100, Srinivas KANDAGATLA wrote:
On 10/06/13 14:15, Mark Rutland wrote:
CONFIG_EXPERIMENTAL's gone as of 3d374d09f1: final removal of
CONFIG_EXPERIMENTAL, so that's fine to go. CONFIG_GPIO_PL061 and
CONFIG_MMC_WMT get selected elsewhere, so that's fine
On Mon, Jun 10, 2013 at 10:27:57AM +0100, Srinivas KANDAGATLA wrote:
This patch adds stih415 and stih416 support to multi_v7_defconfig.
This seems to drop a few options also:
CONFIG_ARM_ARCH_TIMER
CONFIG_ARM_ERRATA_754322
CONFIG_EXPERIMENTAL
CONFIG_GPIO_PL061
CONFIG_MMC_WMT
I just applied this
On Mon, Jun 10, 2013 at 11:58:38AM +0100, Srinivas KANDAGATLA wrote:
Thanks for testing...
On 10/06/13 11:40, Mark Rutland wrote:
On Mon, Jun 10, 2013 at 10:27:57AM +0100, Srinivas KANDAGATLA wrote:
This patch adds stih415 and stih416 support to multi_v7_defconfig.
This seems to drop
On Fri, Apr 26, 2013 at 12:06:21AM +0100, Rob Herring wrote:
On 04/25/2013 05:48 PM, Stephen Boyd wrote:
On 04/25/13 14:47, Rob Herring wrote:
On 04/15/2013 04:33 PM, Stephen Boyd wrote:
On 04/15/13 14:20, Rob Herring wrote:
On Fri, Apr 12, 2013 at 7:27 PM, Stephen Boyd
On Fri, Apr 26, 2013 at 11:18:40AM +0100, Lorenzo Pieralisi wrote:
On Fri, Apr 26, 2013 at 03:51:10AM +0100, Rob Herring wrote:
On Wed, Apr 24, 2013 at 12:28 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
In order to extend the current cpu nodes bindings to newer CPUs
inclusive
Hi Stephen,
+ - enable-method
+ Usage: required on ARM 64-bit systems, optional on ARM 32-bit
+ systems
+ Value type: string
+ Definition: On ARM 64-bit systems must be spin-table [1].
Can that be an integer instead? with dtc+cpp
On Sat, Apr 13, 2013 at 10:33:22PM +0100, Grant Likely wrote:
On Tue, 5 Mar 2013 09:28:49 +, Mark Rutland mark.rutl...@arm.com wrote:
On Mon, Mar 04, 2013 at 02:51:14AM +, Grant Likely wrote:
I could use some more context for how this will be used. Do device
drivers need
topology bindings
Mark Rutland (10):
arm: add functions to parse cpu affinity from dt
arm: perf: clean up PMU names
arm: perf: use IDR types for CPU PMUs
arm: perf: make get_hw_events take arm_pmu
arm: perf: dynamically allocate cpu hardware data
arm: perf: treat PMUs as CPU affine
arm
.
This patch provides the documentation in the kernel required to define the
device tree bindings describing the CPU topology for ARM 32-bit and 64-bit
systems.
Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
Documentation/devicetree/bindings
nodes referenced -
for describing coherency controls an affinity property may indicate a
whole cluster (uncluding any non-CPU logic it contains) is affected by
some configuration.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
arch/arm/include/asm/dt_affinity.h | 12
arch/arm/kernel
in the sys/bus/event_source namespace.
This patch replaces the spaces and dashes in pmu names with underscores,
and renames v6 = ARMv6 to better describe the PMU to userspace. The
oprofile name conversion code is updated to handle this.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Reviewed
the correct set of pmu_hw_events structures.
This patch changes the interface of get_hw_events to take a struct
arm_pmu pointer, to enable future support for multiple PMUs.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Reviewed-by: Will Deacon will.dea...@arm.com
---
arch/arm/include/asm/pmu.h
To support multiple PMUs, each PMU will need its own accounting data.
As we don't know how (in general) many PMUs we'll have to support at
compile-time, we must allocate the data at runtime dynamically
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Reviewed-by: Will Deacon will.dea...@arm.com
. Currently the cpumask is set to match all CPUs.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Reviewed-by: Will Deacon will.dea...@arm.com
---
arch/arm/include/asm/pmu.h | 1 +
arch/arm/kernel/perf_event.c | 20
arch/arm/kernel/perf_event_cpu.c | 10 +-
3 files
In heterogeneous systems, the number of counters may differ across
clusters. To find the number of counters for a cluster, we must probe
the PMU from a CPU in that cluster.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Reviewed-by: Will Deacon will.dea...@arm.com
---
arch/arm/kernel
systems do not have a contiguous range of cpu ids.
This patch parses cpu affinity information for interrupts from an
optional interrupts-affinity devicetree property described in the
devicetree binding document. Currently only SPIs are supported.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
multiple PMUs simultaneously.
This patch replaces the global cpu_pmu pointer with a list of cpu_pmus,
enabling multiple PMUs to be registered and used simultaneously.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
arch/arm/kernel/perf_event_cpu.c | 61
their reg properties. As the A15 PMU has different events than the
A9 PMU, this patch also removes the arm,cortex-a9-pmu compatible
string from the dts.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 44 ++
1 file
On Thu, Apr 11, 2013 at 03:52:52AM +0100, Stephen Boyd wrote:
On 04/10/13 03:13, Mark Rutland wrote:
+
+- #size-cells : Must be 1.
+
+- ranges : Indicates parent and child bus address space are the same.
+
Similarly, what if someone wants to write a more complex mapping for some
On Tue, Apr 09, 2013 at 05:42:38PM +0100, Stephen Boyd wrote:
On 04/09/13 02:08, Mark Rutland wrote:
On Tue, Apr 09, 2013 at 03:30:20AM +0100, Stephen Boyd wrote:
-** Timer node properties:
+** CP15 Timer node properties:
- compatible : Should at least contain one of
arm
optional for a frame to support a virtual timer.
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Marc Zyngier marc.zyng...@arm.com
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
.../devicetree/bindings/arm/arch_timer.txt | 62
On Wed, Mar 20, 2013 at 10:54:01PM +, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
Add an empty version of of_device_is_available.
Signed-off-by: Rob Herring rob.herr...@calxeda.com
---
include/linux/of.h |5 +
1 file changed, 5 insertions(+)
diff --git
On Mon, Mar 04, 2013 at 02:51:14AM +, Grant Likely wrote:
On Thu, 13 Dec 2012 16:49:26 +, Mark Rutland mark.rutl...@arm.com wrote:
[This is an updated version of my previous RFC, which can be found at
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-October/128205.html
Hi,
[...]
+static void samsung_timer_parse_dt(struct device_node *np,
+ const struct of_device_id *match)
+{
+ int i;
+ u32 val;
+
+ timer_base = of_iomap(np, 0);
+ if (!timer_base)
+ panic(failed to map timer registers);
On Sun, Feb 10, 2013 at 01:20:23PM +, Tomasz Figa wrote:
This patch adds support for parsing all platform-specific data from
Device Tree and instantiation using clocksource_of_init to samsung-time
clocksource driver.
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Tomasz Figa
Hi,
[...]
diff --git a/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
new file mode 100644
index 000..6717ab1
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
@@ -0,0 +1,30 @@
+*
Hello,
I have a couple of comments on the dt bindings and the way it's parsed.
On Thu, Feb 07, 2013 at 07:57:04AM +, Manjunathappa, Prakash wrote:
Adds device tree support for davinci_mmc. Also add binding documentation.
Tested in non-dma PIO mode and without GPIO card_detect/write_protect
Hello,
I have a couple of minor comments.
On Thu, Feb 07, 2013 at 02:11:37PM +, Anil Kumar wrote:
DevKit8000 is a beagle board clone from Timll, sold by
armkits.com. The DevKit8000 has RS232 serial port, LCD, DVI-D,
S-Video, Ethernet, SD/MMC, keyboard, camera, SPI, I2C, USB and
JTAG
Hi,
On Wed, Jan 23, 2013 at 04:45:11PM +, Guennadi Liakhovetski wrote:
Many MMC capability flags are platform-dependent and are traditionally set
in platform data. With DT often each such capability requires a special
binding. Add bindings for MMC_CAP_SD_HIGHSPEED, MMC_CAP_MMC_HIGHSPEED
On Mon, Feb 04, 2013 at 03:58:55PM +, Roger Quadros wrote:
Allows the OMAP EHCI controller to be specified via device tree.
Signed-off-by: Roger Quadros rog...@ti.com
---
.../devicetree/bindings/usb/omap-ehci.txt | 34 ++
drivers/usb/host/ehci-omap.c
Hi,
I have a few comments on the binding and the way it's parsed.
On Mon, Feb 04, 2013 at 03:58:56PM +, Roger Quadros wrote:
Allows the OMAP HS USB host controller to be specified
via device tree.
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Roger Quadros rog...@ti.com
---
[...]
+
+- single_ulpi_bypass: Must be present if the controller contains a single
+ ULPI bypass control bit. e.g. OMAP3 silicon = ES2.1
Again it would be nicer to have '-' rather than '_' here. It might be worth
prefixing this ti,.
Is prefixing with ti really required? how does
Hello,
I have a few comments on the devicetree binding and the way it's parsed.
On Thu, Jan 31, 2013 at 10:33:06AM +, Manjunathappa, Prakash wrote:
Adds device tree support for davinci_mmc. Also add
binding documentation.
Tested with non-dma PIO mode and without GPIO
Thomas,
On Tue, Jan 22, 2013 at 11:04:56AM +, Mark Rutland wrote:
On Mon, Jan 21, 2013 at 06:30:47PM +, Thomas Abraham wrote:
Hi Stephen,
On 21 January 2013 09:21, Stephen Warren swar...@wwwdotorg.org wrote:
On 01/20/2013 06:22 PM, Thomas Abraham wrote:
Add an entry
On Fri, Jan 25, 2013 at 07:15:48PM +, Kukjin Kim wrote:
Tomasz Figa wrote:
[...]
Well, the number of CPU types does not grow rapidly. It will be much
less than one per SoC -- so keeping the list up to date shouldn't be
that much effort.
For ARM1176JZF-S, it could make
On Fri, Jan 25, 2013 at 06:11:28PM +, Ezequiel Garcia wrote:
Hi Mark,
First of all: thanks for reviewing.
On Fri, Jan 25, 2013 at 12:56 PM, Mark Rutland mark.rutl...@arm.com wrote:
Hi,
I have a couple more comments after looking though this a bit more
thoroughly.
On Fri
On Fri, Jan 25, 2013 at 10:23:57AM +, Kishon Vijay Abraham I wrote:
Added a new driver for the usb part of control module. This has an API
to power on the USB2 phy and an API to write to the mailbox depending on
whether MUSB has to act in host mode or in device mode.
Writing to control
[...]
+OMAP CONTROL USB
+
+Required properties:
+ - compatible: Should be ti,omap-control-usb
+ - reg : Address and length of the register set for the device. It
contains
+ the address of control_dev_conf and otghs_control or
phy_power_usb
Could you not use '-'
ezequiel.gar...@free-electrons.com
---
Changes from v2:
* Remove unneeded of_node_put() as reported by Mark Rutland
Changes from v1:
* Fix typo in Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
.../devicetree/bindings/mtd/gpmc-onenand.txt | 43 +++
arch/arm/mach
On Fri, Jan 25, 2013 at 04:23:46PM +, Felipe Balbi wrote:
Hi,
On Fri, Jan 25, 2013 at 04:14:02PM +, Mark Rutland wrote:
On Fri, Jan 25, 2013 at 02:59:28PM +, Felipe Balbi wrote:
Hi,
On Fri, Jan 25, 2013 at 12:29:43PM +, Mark Rutland wrote:
+ depending upon
On Tue, Jan 22, 2013 at 10:05:18PM +, Kukjin Kim wrote:
Mark Rutland wrote:
+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
On Tue, Jan 22, 2013 at 01:41:27AM +, Kukjin Kim wrote:
From: Thomas Abraham thomas...@samsung.com
Need to be changed requirements
+struct usb_phy *devm_usb_get_phy_by_phandle(struct device *dev,
+ const char *phandle, u8 index)
+{
+ struct usb_phy *phy = NULL, **ptr;
+ unsigned long flags;
+ struct device_node *node;
+
+ if (!dev-of_node) {
+ dev_dbg(dev, device does not have a
On Mon, Jan 21, 2013 at 06:30:47PM +, Thomas Abraham wrote:
Hi Stephen,
On 21 January 2013 09:21, Stephen Warren swar...@wwwdotorg.org wrote:
On 01/20/2013 06:22 PM, Thomas Abraham wrote:
Add an entry in __clksrc_of_table so that ARMv7 architected timer is
discoverable using call to
There was also the question raised by Mark Rutland on the DT compatible
string.
Currently this is fsl,imx21-owire but Mark thought fsl,imx21-w1 to
be better.
Your reasoning that fsl,imx21-owire better matched the hardware name is
convincing -- bindings don't have to match the Linux view
Hi Thomas,
This looks really useful, and it's going to conflict with my arch_timer /
arm_generic driver unification series [1].
I'm happy to take this as part of my series if that's ok with you?
On Mon, Jan 21, 2013 at 01:22:06AM +, Thomas Abraham wrote:
Add an entry in __clksrc_of_table
[...]
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 01ce462..f7de9eb 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -39,6 +39,7 @@
#include omap_device.h
#include gpmc.h
#include gpmc-nand.h
+#include gpmc-onenand.h
On Mon, Jan 21, 2013 at 10:02:18AM +, Thomas Abraham wrote:
Allow the MCT controller base address and interrupts to be obtained from
device tree and remove unused static definitions of these. The non-dt support
for Exynos5250 is removed but retained for Exynos4210 based platforms.
Cc:
On Sat, Jan 12, 2013 at 03:54:42PM +, Rob Herring wrote:
On 01/10/2013 07:47 AM, Michal Simek wrote:
Hi Rob, Mark, Grant and others,
I want to check with you the location of ARM pmu node
I see that
1) highbank and dbx5x0 have it in soc node
2) vexpress and tegra have no main
On Mon, Jan 14, 2013 at 07:02:06AM +, Linus Walleij wrote:
On Fri, Jan 11, 2013 at 6:57 PM, Mark Rutland mark.rutl...@arm.com wrote:
On Fri, Jan 11, 2013 at 05:04:11PM +, Grant Likely wrote:
On Tue, 8 Jan 2013 09:57:29 +, Mark Rutland mark.rutl...@arm.com
wrote:
Maybe
On Mon, Jan 14, 2013 at 09:36:10AM +, Michal Simek wrote:
2013/1/14 Mark Rutland mark.rutl...@arm.com:
On Sat, Jan 12, 2013 at 03:54:42PM +, Rob Herring wrote:
On 01/10/2013 07:47 AM, Michal Simek wrote:
Hi Rob, Mark, Grant and others,
I want to check with you the location
Hello,
This all looks good. I just have a couple of comments about the cpus node.
On Sun, Jan 13, 2013 at 01:10:57AM +, Tomasz Figa wrote:
This patch adds basic device tree definitions for Samsung S3C64xx SoCs.
Since all the SoCs in the series are very similar, the files are created
On Wed, Jan 09, 2013 at 06:30:02AM +, Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
This CPU has four interrupt controllers (INTCA, pins-High and pins-Low).
This supports these.
Note: This supports DT of INTCA only.
Cc: Magnus Damm d...@opensource.se
in dt, without any thought as to whether or not this is
a clean representation of the hardware.
Cc: Magnus Damm d...@opensource.se
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Simon Horman horms+rene...@verge.net.au
---
v9
* As suggested by Mark
Hi,
I have some comments on the devicetree binding.
On Sat, Dec 15, 2012 at 09:03:35AM +, Simon Horman wrote:
From: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
This provides OF support of SH/INTC.
The SH/INTC driver is used by SuperH and ARM/SH-MOBILE.
At the moment, SuperH does
On Thu, Dec 13, 2012 at 07:21:30PM +, Jon Hunter wrote:
On 12/13/2012 11:41 AM, Will Deacon wrote:
On Wed, Dec 12, 2012 at 09:43:05PM +, Jon Hunter wrote:
Adds a device-tree binding for the ARM Cross Trigger Interface (CTI).
The ARM Cross Trigger Interface provides a way to route
On Fri, Dec 14, 2012 at 09:26:37PM +, Jon Hunter wrote:
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430.
Signed-off-by: Jon Hunter
with this affinity information, allowing drivers to extract a (logical)
cpumask specifying the affinity of each interrupt, and additional information
specifying whether an interrupt targets multiple cpus.
The patches are based on rmk's for-next branch.
Any thoughts?
Thanks,
Mark.
Mark Rutland (2):
of: add
index in a list, making this case easier.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
drivers/of/base.c | 36
include/linux/of.h | 11 +++
2 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/drivers/of/base.c b/drivers
is in the range [0-3]. When the value is 3, MPIDR
affinity levels 2,1,0 are ignored, and all CPUs are matched. Affinity
bits which are not to be matched should be set to zero.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
---
arch/arm/include/asm/dt_irq.h |9
arch/arm/kernel/devtree.c | 91
Hi,
Just a couple of comments on the binding documentation.
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt
b/Documentation/devicetree/bindings/arm/cpus.txt
new file mode 100644
index 000..1fab07a
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -0,0
On Mon, Nov 19, 2012 at 12:45:03PM +, Lorenzo Pieralisi wrote:
When booting through a device tree, the kernel cpu logical id map can be
initialized using device tree data passed by FW or through an embedded blob.
This patch adds a function that parses device tree cpu nodes and
retrieves
On Fri, Nov 16, 2012 at 06:38:21AM +, Alexandre Courbot wrote:
Some device drivers (e.g. panel or backlights) need to follow precise
sequences for powering on and off, involving GPIOs, regulators, PWMs
with a precise powering order and delays to respect between steps.
These sequences are
-kernel/2012-October/125882.html
Mark Rutland (2):
of: add of_property_count_phandles
ARM: Add functions to parse dt irq affinity
arch/arm/include/asm/dt_irq.h | 64
arch/arm/kernel/devtree.c | 165 +
drivers/of/base.c
Though of_parse_phandle handles lists of phandles, and takes an index
parameter, there is no standard way of discovering how many phandles are
present on a node. This patch adds a function to count how many phandles
are in a phandle list.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
an affinity
value, then the interrupt at index i in the interrupts list is affine
to the cpu or cluster pointed to by the entry in the affinity list at
index i. Interrupts affine to a cluster are PPIs, and interrupts
affine to a single cpu are SPIs.
Signed-off-by: Mark Rutland mark.rutl
). Unfortunately the
OF binding does not represent the interrupt.
This patch adds an interrupts property to the L2x0 OF binding,
representing the combined interrupt line.
Signed-off-by: Mark Rutland mark.rutl...@arm.com
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc
Hi all,
I'm working on a driver for the PMU found in L220/PL310 L2 Cache Controllers
(as an extension to the existing L2x0 code).
I've taken a look into what BSP support would be required and mocked up some
platform_device support, though I notice that Rob Herring has provided
devicetree
Hi,
static int __devinit pmu_device_probe(struct platform_device *pdev)
{
+ enum arm_pmu_type type = pdev-id;
- if (pdev-id 0 || pdev-id = ARM_NUM_PMU_DEVICES) {
+ if (pdev-dev.of_node)
+ type = ARM_PMU_DEVICE_CPU;
+
+ if (type 0 || type =
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