Hi Rob,
Am Donnerstag, den 04.04.2013, 08:49 -0500 schrieb Rob Herring:
On 03/28/2013 11:35 AM, Philipp Zabel wrote:
From: Stephen Warren swar...@nvidia.com
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
It
On 03/28/2013 11:35 AM, Philipp Zabel wrote:
From: Stephen Warren swar...@nvidia.com
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
It consists of a binding for a reset controller device (provider), and a
pair of
From: Stephen Warren swar...@nvidia.com
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
It consists of a binding for a reset controller device (provider), and a
pair of properties, resets and reset-names, to link a device
