P.S.: From the following bug report, it looks like gcc and
icc honor stack alignments >= 16:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=44948
That would be a good solution for dmd, too.
--
Marco
On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote:
I'll try to be concise: The stack on x64 is 16-byte aligned,
enough for SSE registers, but not the 32-byte AVX registers.
Any data structure containing AVX registers, cannot be
guaranteed to be correctly aligned on the stack, but we get
On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote:
void main() {
import core.simd;
Matrix4x4 matrix; // No warning
float8 vector; // No warning
}
Did you do some LDC IR/asm testing?
With LDC, the type `float8` has 32-byte alignment and so will be
placed with that ali
Am Sun, 29 May 2016 13:20:12 +
schrieb Johan Engelen :
> On Sunday, 29 May 2016 at 12:07:02 UTC, Marco Leise wrote:
> >
> > void main() {
> > import core.simd;
> > Matrix4x4 matrix; // No warning
> > float8 vector; // No warning
> > }
>
> Did you do some LDC IR/asm testing