Hello,
I am trying to use the gr.clock_recovery_mm_cc (float
omega, float gain_omega, float mu, float gain_mu).
What do I set for the omega, gain_omega, mu, and
gain_mu? There is also a version of this function
with 5 parameters.
Also, what should be the number of samples per bit
going into thi
George Barrinuevo wrote:
--
complex_to_float = gr.complex_to_float ()
slicer = gr.binary_slicer_fb()
dst_file = gr.file_sink(gr.sizeof_float,
"out_file2.txt")
self.connect (ddc, complex_to_float, slicer,
dst_file)
--
ValueError: source and destination data sizes
I am trying to get the gr.binary_slicer_fb() to work,
but it gives me an error. The _fb means float to
binary, correct? Are there any arguments to
gr.binary_slizer_fb()? Can someone tell me what is
wrong?
--
complex_to_float = gr.complex_to_float ()
slicer = gr.binary_slicer_fb()
On Fri, Mar 23, 2007 at 03:21:03PM -0700, Eric Blossom wrote:
> On Fri, Mar 23, 2007 at 02:45:54PM -0400, Thibaud Hottelier wrote:
>
> > For each channel fifo, a process would wait for the timestamps to match
> > the time register and then write the next <#samples> to the
> > corresponding chann
On Fri, Mar 23, 2007 at 02:59:37PM -0400, Brian Padalino wrote:
> On 3/23/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
> >So, let me summarize:
> >
> >One dual clock fifo (usb_fifo) to buffer the packet from the FX2. One
> >process store the data from the usb while one other process read them
>
On Fri, Mar 23, 2007 at 02:45:54PM -0400, Thibaud Hottelier wrote:
> Eric Blossom wrote:
> >On Thu, Mar 22, 2007 at 03:33:08PM -0400, Brian Padalino wrote:
> >>On 3/22/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
> >>>I can copy the sample to a fifo, but I still have 3 processes that want
> >>>
Matt Ettus wrote:
> The rev 4 and newer USRPs have a clock generator chip that is
spec'ed to
take a signal as low as 150 mV p-p. However in my testing I found I
needed a voltage as high as 8 or 9dBm. 8dBm is about .8V, so that
should still work.
Sorry if this isn't relevant to everybody on
Brian Padalino wrote:
On 3/23/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
So, let me summarize:
One dual clock fifo (usb_fifo) to buffer the packet from the FX2. One
process store the data from the usb while one other process read them
and splits commands (stored in cmd_fifo) from data (st
On 3/23/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
So, let me summarize:
One dual clock fifo (usb_fifo) to buffer the packet from the FX2. One
process store the data from the usb while one other process read them
and splits commands (stored in cmd_fifo) from data (stored in
chan0_fifo, cha
Eric Blossom wrote:
On Thu, Mar 22, 2007 at 03:33:08PM -0400, Brian Padalino wrote:
On 3/22/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
I can copy the sample to a fifo, but I still have 3 processes that want
to use the RAM a the same time: One to progressively store the packets
coming from
On Fri, Mar 23, 2007 at 08:30:45AM -0700, Chris Albertson wrote:
>
> --- Robert Miller <[EMAIL PROTECTED]> wrote:
>
> >
> > >> sudo make check
>
> Do you really need to build this as "root"?
>
> Chris Albertson
No.
Depending on ownership and permissions in the install directory, you
may need
On Fri, Mar 23, 2007 at 10:15:12AM -0400, Brian Padalino wrote:
> On 3/23/07, Eric Blossom <[EMAIL PROTECTED]> wrote:
> >I think I steered us down the wrong path with the shared RAM idea.
> >We really do want a dedicated read port for each channel in the Tx
> >direction. This is easy if we assigne
Hello,
Currently I am using a Thinkpad Z60t laptop for GNURadio using OpenSUSE
10.2. It has a 1.73 GHz Pentium M. It seems to do a good job but I
have hit the processing wall a few times. Most turned out to be
programming errors that ate up CPU cycles. I do seem to always get an
error from the
No, I just tried it as root as a quick (but silly) test. I get the same
results with "make check".
Thanks,
Rob
Chris Albertson wrote:
>
>
> --- Robert Miller <[EMAIL PROTECTED]> wrote:
>
>>
>> >> sudo make check
>
> Do you really need to build this as "root"?
>
> Chris Albertson
> Home
--- Robert Miller <[EMAIL PROTECTED]> wrote:
>
> >> sudo make check
Do you really need to build this as "root"?
Chris Albertson
Home: 310-376-1029 [EMAIL PROTECTED]
Office: 310-336-5189 [EMAIL PROTECTED]
__
On 3/23/07, Eric Blossom <[EMAIL PROTECTED]> wrote:
I think I steered us down the wrong path with the shared RAM idea.
We really do want a dedicated read port for each channel in the Tx
direction. This is easy if we assigned a FIFO (or dedicated RAM) per
channel.
Sounds good. It really should
"EVENNOU Frederic RD-TECH-GRE" <[EMAIL PROTECTED]>
writes:
> I am currently developping a cognitive radio demonstration system under
> the GNU Radio Platform and I am particularly interested in the mblocks
> extension proposed by the ADROIT Project. Reading the available
> documentation and look
On Thu, Mar 22, 2007 at 06:44:01PM -0400, Thibaud Hottelier wrote:
> A quick update while I am understanding your previous message.
>
> The Rx and Tx buffers use 16 blocks each.
This is probably overkill. As I mentioned earlier, we weren't using
the memory, so we just assigned it to these buffer
On Thu, Mar 22, 2007 at 02:14:05PM -0700, Johnathan Corgan wrote:
> Jonathan Shan wrote:
>
> >> What do you have the transmitter interpolation and receiver decimation
> >> set to?
> >
> > interp_rate = 64, decim_rate = 16.
> >
> > I saw the formulas
> > usb_sample_rate1 = 64e6 / decim_rate
> > u
On Thu, Mar 22, 2007 at 04:51:10PM -0400, Brian Padalino wrote:
> On 3/22/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
> >So the fpga would only use fifo and push the data to next one. It does
> >not work if shared RAM is used to avoid copy between buffers; or I am
> >completely wrong and I fai
Il giorno gio, 22/03/2007 alle 12.14 +0100, Davide Anastasia ha scritto:
> Il giorno mar, 20/03/2007 alle 10.09 +0100, Davide Anastasia ha scritto:
> > > Maybe we should make gr_complex_short be a typedef for
> > > complex
> > > and output those.
> >
> > Yep, in this way std::complex make conve
On Thu, Mar 22, 2007 at 04:34:49PM -0400, Thibaud Hottelier wrote:
> Brian Padalino wrote:
> >
> >Did you ever compile the design with Quartus II to get a report of how
> >many resources we can use for these FIFOs? It might be a good idea to
> >see how much space we have in block RAM to distribute
Dear all,
I am currently developping a cognitive radio demonstration system under
the GNU Radio Platform and I am particularly interested in the mblocks
extension proposed by the ADROIT Project. Reading the available
documentation and looking to the source code, I realized that the
extension is
On Thu, Mar 22, 2007 at 03:33:08PM -0400, Brian Padalino wrote:
> On 3/22/07, Thibaud Hottelier <[EMAIL PROTECTED]> wrote:
> >I can copy the sample to a fifo, but I still have 3 processes that want
> >to use the RAM a the same time: One to progressively store the packets
> >coming from the usb bus,
2007/3/23, Kerry Miller <[EMAIL PROTECTED]>:
I recently became aware of gnuradio. I run Fedora Core 5 Linux. I
downloaded the gnuradio software and got this message:
checking for fftw3f >= 3.0... Package fftw3f was not found in the
pkg-config search path. Perhaps you should add the directory con
Hello,
I am new to the gnuradio. I have installed the gnuradio on cygwin. I have also
installed the USRP and all the example python codes run fine.I just wanted to
know how do you go about
Programming/Reprogramming the FPGA in the USRP board using the verilog in
Altera Quartus 2 Software.
I recently became aware of gnuradio. I run Fedora Core 5 Linux. I
downloaded the gnuradio software and got this message:
checking for fftw3f >= 3.0... Package fftw3f was not found in the
pkg-config search path. Perhaps you should add the directory containing
`fftw3f.pc' to the PKG_CONFIG_PATH envi
Hi,
I've been in contact with the developer of qwt, and he seemed
interested in adding a pkg-config file to qwt, so hopefully it will be
included in future released.
I haven't submitted it for inclusion in Fedora yet, but I think the
package is pretty much ready. One last thing: Are you building
28 matches
Mail list logo
