Michael Dickens wrote:
Ed - Please try the latest SVN trunk or both GNU Radio and GRC, then
report back to the list. This might be due to some bugs I fixes in the
some GNU Radio OSX code recently. Or it might not ... but trying the
latest SVN trunk is always wise with an issue like this
On Thu, Sep 13, 2007 at 02:03:55AM +0200, Vincenzo Pellegrini wrote:
> AMD sempron 3000+, 512KiB RAM
> USB2.0 on board
> 00:03.0 USB Controller: Silicon Integrated Systems [SiS] USB 1.0
> Controller (rev 0f)
> 00:03.1 USB Controller: Silicon Integrated Systems [SiS] USB 1.0
> Controller (rev 0f)
>
On Wed, Sep 12, 2007 at 11:55:08PM +0200, Vincenzo Pellegrini wrote:
> I'm beginning to see some light over my 8MHz tx problems..
>
> the throughput towards my USRP is significantly reduced compared to the
> one from it...
>
>
> ./test_usrp_standard_tx
> xfered 1.34e+08 bytes in 5.46 seconds. 2
On Wed, Sep 12, 2007 at 01:51:01PM +0900, melanio wrote:
> Hi everyone,
>
> I am trying to record I/Q data from two daughter-boards(TVRX,RFX400) on one
> USRP mother board simultaneously.
>
> It is no problems in recording data from either of these daughter-boards
> independently, but I don't kn
I'm beginning to see some light over my 8MHz tx problems..
the throughput towards my USRP is significantly reduced compared to the
one from it...
./test_usrp_standard_tx
xfered 1.34e+08 bytes in 5.46 seconds. 2.457e+07 bytes/sec. cpu time =
0.492
0 underruns
./test_usrp_standard_rx
xfered 1.
Hi!
The AGC that is theoretically available at the analog devices chip on
the Flex2400 boards, is it turned on? Or is it even wired?
The datasheet says that there outputs and inputs, a simple rms detector
and the agc input. And if these are connected, you have an AGC.
Are they connected at sold
On 9/12/07, [EMAIL PROTECTED] <[EMAIL PROTECTED]> wrote:
> Hi,
> I am a student and I carry out a degree thesis about SDR in particular FPGA. I
> have seen some modules of FPGA but I haven't understood however these modules
> are interconnected between them.
> Could you give me any informations?
I
Hi,
I am a student and I carry out a degree thesis about SDR in particular FPGA. I
have seen some modules of FPGA but I haven't understood however these modules
are interconnected between them.
Could you give me any informations?
Thank you very much.
Calogero
_
