Hi,
One weeks ago I downloaded OFDM program (modified for USRP2, from Veljko
Pejovic ) and tested with it. I got a problem when I used USRP2 to transmit
OFDM packets. When I transmit continuous OFDM signals the receiver only receive
some pieces of packet. So I tried to test with one packet.
Hi,
The range of an int16 is +/-2^15, the minimum step is 1 because its an
integer. Did you by any change change the io type to int16, but
interpret the buffer as a complex float?
-josh
I figure out that UHD output small endian data. But I use it as big endian,that
is the reason why
Hi,
I met a strange problem about UHD output data. I write the sampler program
according to rx_timed_samples.cpp and use int 16 bits as io type as in command:
size_t num_rx_samps = dev-recv(
buff, sizeof(buff),
md, uhd::io_type_t::COMPLEX_INT16,
Hi,
I want to test the clock of USRP2 with UHD. Is there UHD function replaces
original function clocks_enable_test_clk()?
Thank you for your help!
Liang
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Hi,
After several days test, I got the conclusion that USRP2 could be synchronized
with UHD accurately. The lastest UHD version fixed stream bug with PPS and make
it possible to sampling with delay less than 0.5ns. I attached histogram of
delay distribution. The test is run on two USRP2
Hi,
These days I am trying to synchronize two USRP2 with PPS signal and UHD. The
two USRP2 is connect with same reference clock and PPS signal. I use function
set_time_next_pps(uhd::time_spec_t(0)) to set time to be zero, and make two
USRP2 start sampling after 3 seconds. The result shows
Hi,
You need to configure the usrp2 to use the external reference. Did you
run set_clock_config(...) prior to setting the time?
Yes,
I have set the clock config to make USRP2 lock to reference clock SMA and PPS
SMA.
When performing set_time_next_pps(...) you will want a sleep(1) prior to
I downloaded the image from the website and flashed it into the SD card. With
command 'uhd_find_devices' I could not find the USRP2 for most of time(try
hundred times find twice). I could not get reply for the ping command neither.
I used 1GB card. There is no firewall. And the computer has
Hi,
I followed the uhd build instructions and there is error of undefined reference
of boost
functions...it is the error information below:
---
Linking CXX executable rx_timed_samples
CMakeFiles/rx_timed_samples.dir/rx_timed_samples.cpp.o: In function `_main(int,
The previous problem disappeared when I changed library to boost 1.37.
Thanks!
Liang
_
约会说不清地方?来试试微软地图最新msn互动功能!
Hi,
I am using xilinx ISE 11.1 to rebuild FPGA source.
With command
/gnuradio/usrp2/fpga/top/u2_rev3$ make bin
I get error
=
while executing
project set $key $opt -process $process
invoked from within
if ![string compare $process Project] {
with command
gnuradio/usrp2/fpga/top/u2_rev3$ make bin
I got errors when mapping:
ERROR:Pack:2310 - Too many comps of type RAMB16 found to fit this device.
ERROR:Pack:18 - The design is too large for the given device and package.
below is design summary...
=
Design Summary:
Number
Hi,
I tried to use Xilinx ISE 11.1 to open project
usrp2/fpga/top/u2_fpga/u2_fpga.ise.There are some files missing,such
asfifo_generator_4_1.v . And there are errors when implement design...
==
ERROR:ConstraintSystem:59 - Constraint NET adc_a[0]
hi,
Now I am working with BasicRX daughterboard. I want to implement
multi-receivers on the same channel. It works well when I connect only one
antenna to RX-A of BasicRX borad.Then I want to sample by 2 antennas,which
connect to RX-A and RX-B on BasicRX board. What configuration should I
Thanks for Matt's bin file, I burn it to SD card and I have both good news and
bad news.
Good news is that it appears that the clock is gradually locked to reference
clock about 10 seconds after USRP2 start up. The bad news is that it could only
lock for about 4 or 5 seconds and then start to
Hi,
anybody test the synchronization with reference clock of usrp2? Now with
command
clocks_enable_test_clk(true, 1);
I still get drifting between J503 and reference clock,is there anybody make it
works?
Thanks for any given words!
Liang
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